summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H
diff options
context:
space:
mode:
authorThi Tran <thi@us.ibm.com>2015-10-29 12:10:28 -0500
committerStephen Cprek <smcprek@us.ibm.com>2016-02-19 15:31:48 -0600
commit9f41fa3cd378ffec67fa5b4dc21ec9bcae5ff68d (patch)
tree4b53b9d8640d1e59256ed5275433bd32abb5d887 /src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H
parentabb03b2c9c0e849fa2614ae55292fccba7711fd4 (diff)
downloadtalos-hostboot-9f41fa3cd378ffec67fa5b4dc21ec9bcae5ff68d.tar.gz
talos-hostboot-9f41fa3cd378ffec67fa5b4dc21ec9bcae5ff68d.zip
p9_mss_setup_bars procedure (Level 1)
Change-Id: I90394656ad08b3de808e92a3b867633069ef4b76 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21603 Tested-by: Jenkins Server Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Michael Dye <dyem@us.ibm.com> Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23167 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H75
1 files changed, 75 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H
new file mode 100644
index 000000000..96eef8f60
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H
@@ -0,0 +1,75 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/hwp/nest/p9_mss_setup_bars.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/// ----------------------------------------------------------------------------
+/// @file p9_mss_setup_bars.H
+///
+/// @brief p9_mss_setup_bars HWP
+///
+/// Program memory controller base address registers (BARs)
+///
+/// ----------------------------------------------------------------------------
+/// *HWP HWP Owner : Joe McGill <jmcgill@us.ibm.com>
+/// *HWP FW Owner : Thi Tran <thi@us.ibm.com>
+/// *HWP Team : Nest
+/// *HWP Level : 1
+/// *HWP Consumed by : HB
+/// ----------------------------------------------------------------------------
+
+#ifndef _P9_MSS_SETUP_BARS_H_
+#define _P9_MSS_SETUP_BARS_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+
+// Function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_mss_setup_bars_FP_t)(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
+
+//----------------------------------------------------------------------------
+// Constant definitions
+//----------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+///
+/// @brief p9_mss_setup_bars procedure
+///
+/// This HWP configures the memory controller BARs on a single chip
+/// to cover/acknowledge the non-mirrored/mirrored address space assigned
+/// to each channel
+///
+/// @param[in] i_target Reference to TARGET_TYPE_PROC_CHIP target
+///
+/// @return FAPI2_RC_SUCCESS if success, else error code.
+///
+
+ fapi2::ReturnCode p9_mss_setup_bars(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+} // extern "C"
+
+#endif // _P9_MSS_SETUP_BARS_H_
OpenPOWER on IntegriCloud