support IO reconfig loop for OBUS DL link training failures

- p9c DD1.1+ only, DD1.0 not supported

- FW to trigger reconfig loop back to step 0 from
  sys_proc_fab_iovalid if:
  1) sys_proc_fab_iovalid rc = FAPI2_RC_SUCCESS
     -- AND --
  2) new output o_obus_dl_rcs (vector of P9_FAB_IOVALID_DL_NOT_TRAINED_ERR rc
     objects identifying links which failed on this chip) has entries

- attribute changes:
  ATTR_LINK_TRAIN -- remove platinit tag, attr should init to zero (both even
                     and odd), and reconfig loop will adjust value as we go

CMVC-Prereq:1057645
Change-Id: I95eebd2b893db6d2511aae40798c0a4e049835d6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59022
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59039
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 12 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H
index ea4fc0032..8f2a1849b 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_smp_utils.H
@@ -79,6 +79,7 @@ struct p9_fbc_link_ctl_t
     // DL layer SCOM addresses
     uint64_t      dl_fir_addr;
     uint64_t      dl_control_addr;
+    uint64_t      dl_status_addr;
     // TL layer SCOM addresses
     uint64_t      tl_fir_addr;
     uint8_t       tl_fir_trained_field_start_bit;
@@ -105,6 +106,7 @@ const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X0_FIR_ERR,
         XBUS_LL0_LL0_LL0_IOEL_FIR_REG,
         XBUS_0_LL0_IOEL_CONTROL,
+        XBUS_LL0_IOEL_DLL_STATUS,
         PU_PB_IOE_FIR_REG,
         PU_PB_IOE_FIR_REG_FMR00_TRAINED,
         PU_PB_ELINK_DLY_0123_REG,
@@ -120,6 +122,7 @@ const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X1_FIR_ERR,
         XBUS_1_LL1_LL1_LL1_IOEL_FIR_REG,
         XBUS_1_LL1_IOEL_CONTROL,
+        XBUS_1_LL1_IOEL_DLL_STATUS,
         PU_PB_IOE_FIR_REG,
         PU_PB_IOE_FIR_REG_FMR02_TRAINED,
         PU_PB_ELINK_DLY_0123_REG,
@@ -135,6 +138,7 @@ const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X2_FIR_ERR,
         XBUS_2_LL2_LL2_LL2_IOEL_FIR_REG,
         XBUS_2_LL2_IOEL_CONTROL,
+        XBUS_2_LL2_IOEL_DLL_STATUS,
         PU_PB_IOE_FIR_REG,
         PU_PB_IOE_FIR_REG_FMR04_TRAINED,
         PU_PB_ELINK_DLY_45_REG,
@@ -150,6 +154,7 @@ const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X3_FIR_ERR,
         OBUS_LL0_LL0_LL0_PB_IOOL_FIR_REG,
         OBUS_0_LL0_IOOL_CONTROL,
+        OBUS_0_LL0_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR00_TRAINED,
         PU_IOE_PB_OLINK_DLY_0123_REG,
@@ -165,6 +170,7 @@ const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X4_FIR_ERR,
         OBUS_1_LL1_LL1_LL1_PB_IOOL_FIR_REG,
         OBUS_1_LL1_IOOL_CONTROL,
+        OBUS_1_LL1_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR02_TRAINED,
         PU_IOE_PB_OLINK_DLY_0123_REG,
@@ -180,6 +186,7 @@ const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X5_FIR_ERR,
         OBUS_2_LL2_LL2_LL2_PB_IOOL_FIR_REG,
         OBUS_2_LL2_IOOL_CONTROL,
+        OBUS_2_LL2_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR04_TRAINED,
         PU_IOE_PB_OLINK_DLY_4567_REG,
@@ -195,6 +202,7 @@ const p9_fbc_link_ctl_t P9_FBC_XBUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_X_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X6_FIR_ERR,
         OBUS_3_LL3_LL3_LL3_PB_IOOL_FIR_REG,
         OBUS_3_LL3_IOOL_CONTROL,
+        OBUS_3_LL3_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR06_TRAINED,
         PU_IOE_PB_OLINK_DLY_4567_REG,
@@ -214,6 +222,7 @@ const p9_fbc_link_ctl_t P9_FBC_ABUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_A_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X3_FIR_ERR,
         OBUS_LL0_LL0_LL0_PB_IOOL_FIR_REG,
         OBUS_0_LL0_IOOL_CONTROL,
+        OBUS_0_LL0_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR00_TRAINED,
         PU_IOE_PB_OLINK_DLY_0123_REG,
@@ -229,6 +238,7 @@ const p9_fbc_link_ctl_t P9_FBC_ABUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_A_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X4_FIR_ERR,
         OBUS_1_LL1_LL1_LL1_PB_IOOL_FIR_REG,
         OBUS_1_LL1_IOOL_CONTROL,
+        OBUS_1_LL1_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR02_TRAINED,
         PU_IOE_PB_OLINK_DLY_0123_REG,
@@ -244,6 +254,7 @@ const p9_fbc_link_ctl_t P9_FBC_ABUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_A_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X5_FIR_ERR,
         OBUS_2_LL2_LL2_LL2_PB_IOOL_FIR_REG,
         OBUS_2_LL2_IOOL_CONTROL,
+        OBUS_2_LL2_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR04_TRAINED,
         PU_IOE_PB_OLINK_DLY_4567_REG,
@@ -259,6 +270,7 @@ const p9_fbc_link_ctl_t P9_FBC_ABUS_LINK_CTL_ARR[P9_FBC_UTILS_MAX_A_LINKS] =
         PU_PB_CENT_SM1_EXTFIR_MASK_REG_PB_X6_FIR_ERR,
         OBUS_3_LL3_LL3_LL3_PB_IOOL_FIR_REG,
         OBUS_3_LL3_IOOL_CONTROL,
+        OBUS_3_LL3_IOOL_DLL_STATUS,
         PU_IOE_PB_IOO_FIR_REG,
         PU_IOE_PB_IOO_FIR_REG_FMR06_TRAINED,
         PU_IOE_PB_OLINK_DLY_4567_REG,