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| author | dchowe <dchowe@us.ibm.com> | 2017-05-02 16:12:55 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-05-22 09:55:21 -0400 |
| commit | 5156dbe7de43e67ec71c7cd97786cd25c4213f6f (patch) | |
| tree | 011eae0aed51a542b61e0dead70993bb30ce19f7 /src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C | |
| parent | c916edc39a12649a107d24e9a0f0a3ffe431d338 (diff) | |
| download | talos-hostboot-5156dbe7de43e67ec71c7cd97786cd25c4213f6f.tar.gz talos-hostboot-5156dbe7de43e67ec71c7cd97786cd25c4213f6f.zip | |
Initfile updates for FBC DD2
Change-Id: I18bf87b49f9bfba577bfc55fdf3cadc1fe09849f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39973
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: DANIEL C. HOWE <dchowe@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Dev-Ready: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39975
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C index c970c4259..6f01436f8 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C @@ -63,9 +63,17 @@ const uint32_t EPSILON_W_T1_LE[] = { 9, 10, 11, 13, 15, 27 }; // HE epsilon (4 chips per-group) const uint32_t EPSILON_R_T0_HE[] = { 7, 7, 8, 8, 10, 22 }; const uint32_t EPSILON_R_T1_HE[] = { 77, 78, 81, 84, 89, 113 }; -const uint32_t EPSILON_R_T2_HE[] = { 168, 170, 172, 175, 180, 204 }; +const uint32_t EPSILON_R_T2_HE[] = { 187, 189, 191, 194, 199, 223 }; const uint32_t EPSILON_W_T0_HE[] = { 12, 13, 14, 16, 18, 30 }; -const uint32_t EPSILON_W_T1_HE[] = { 76, 77, 78, 80, 82, 94 }; +const uint32_t EPSILON_W_T1_HE[] = { 96, 97, 98, 99, 102, 114 }; + +// TODO: These values need to be selected for flat 8 topology systems. +// HE epsilon (1x8) +// const uint32_t EPSILON_R_T0_F8[] = { 7, 7, 8, 8, 10, 22 }; +// const uint32_t EPSILON_R_T1_F8[] = { 7, 7, 8, 8, 10, 22 }; +// const uint32_t EPSILON_R_T2_F8[] = { 145, 146, 149, 152, 157, 181 }; +// const uint32_t EPSILON_W_T0_F8[] = { 0, 0, 0, 0, 0, 5 }; +// const uint32_t EPSILON_W_T1_F8[] = { 73, 74, 75, 77, 79, 91 }; //------------------------------------------------------------------------------ |
