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| author | Daniel Howe <dchowe@us.ibm.com> | 2018-01-10 13:20:07 -0600 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-01-24 17:39:20 -0500 |
| commit | 08b4146e8dc8aca824d8a8cc5dc62c23cc23827c (patch) | |
| tree | a51854feb4aadd6a7b4e1a0cd2a23ab97404c7a3 /src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C | |
| parent | e75b51ba9604d184bf01b5ea7d572ba614d3d2bb (diff) | |
| download | talos-hostboot-08b4146e8dc8aca824d8a8cc5dc62c23cc23827c.tar.gz talos-hostboot-08b4146e8dc8aca824d8a8cc5dc62c23cc23827c.zip | |
Extend xbus oc expiration timers and updated epsilon for fleetwood
Change-Id: I168c64e12e7d0ebe60e0a6ffc021d55aa77fd0a0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51730
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51739
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C index fcbf75eb8..4a40bb1f4 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_eff_config.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -61,10 +61,10 @@ const uint32_t EPSILON_W_T1_LE[] = { 9, 10, 11, 13, 15, 27 }; // HE epsilon (4 chips per-group) const uint32_t EPSILON_R_T0_HE[] = { 7, 7, 8, 8, 10, 22 }; -const uint32_t EPSILON_R_T1_HE[] = { 77, 78, 81, 84, 89, 113 }; -const uint32_t EPSILON_R_T2_HE[] = { 187, 189, 191, 194, 199, 223 }; -const uint32_t EPSILON_W_T0_HE[] = { 12, 13, 14, 16, 18, 30 }; -const uint32_t EPSILON_W_T1_HE[] = { 96, 97, 98, 99, 102, 114 }; +const uint32_t EPSILON_R_T1_HE[] = { 86, 88, 90, 93, 98, 122 }; +const uint32_t EPSILON_R_T2_HE[] = { 197, 198, 201, 204, 209, 233 }; +const uint32_t EPSILON_W_T0_HE[] = { 22, 23, 24, 26, 28, 40 }; +const uint32_t EPSILON_W_T1_HE[] = { 105, 106, 107, 109, 111, 123 }; // HE epsilon (flat 4 Zeppelin) const uint32_t EPSILON_R_T0_F4[] = { 7, 7, 8, 8, 10, 22 }; |
