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author | Joe McGill <jmcgill@us.ibm.com> | 2016-03-03 08:56:59 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-13 00:02:12 -0400 |
commit | ec7c3db64967522e44713766119c0023382e9bc7 (patch) | |
tree | 7384b0f278d4d9299fa8d1fa9e2242ddc4d30601 /src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H | |
parent | 520d5cf53105bfe6ec39c3d02992a54aeda225cc (diff) | |
download | talos-hostboot-ec7c3db64967522e44713766119c0023382e9bc7.tar.gz talos-hostboot-ec7c3db64967522e44713766119c0023382e9bc7.zip |
L2 - Fabric updates for multi-chip support
Refactor p9_build_smp code
Add FBC effective config (attribute-only) HWPs
Add/call FBC initfiles
HWP flow
p9_fbc_eff_config
p9_fbc_eff_config_links
p9_chiplet_scominit
p9_smp_link_layer
p9_fab_iovalid
p9_fbc_eff_config_aggregate
p9_build_smp
Update engd used in build to e9035 u087
Change-Id: Iff8f22941a01bd6783fd5e817bcb6bc730b846f5
Original-Change-Id: I9ab9e967847d380596e896a14e481ad8cf247b9a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21643
Tested-by: PPE CI
Tested-by: Hostboot CI
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24464
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H')
-rwxr-xr-x | src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H index a80b3073a..63b23dd6e 100755 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H @@ -56,8 +56,11 @@ //------------------------------------------------------------------------------ /// function pointer typedef definition for HWP call support -typedef fapi2::ReturnCode (*p9_fab_iovalid_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, - const bool); +typedef fapi2::ReturnCode (*p9_fab_iovalid_FP_t) ( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, + const bool, + const bool, + const bool); //------------------------------------------------------------------------------ // Function prototypes @@ -69,12 +72,17 @@ extern "C" /// /// @brief Raise/lower iovalids for all logically enabled links on a single chip /// -/// @param[in] i_target Reference to processor chip target -/// @param[in] i_set_not_clear Define iovalid operation (true=set, false=clear) +/// @param[in] i_target Reference to processor chip target +/// @param[in] i_set_not_clear Define iovalid operation (true=set, false=clear) +/// @param[in] i_manage_electrical Manage electrical links? +/// @param[in] i_manage_optical Manage optical links? +/// /// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9_fab_iovalid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, - const bool i_set_not_clear); + const bool i_set_not_clear, + const bool i_manage_electrical, + const bool i_manage_optical); } // extern "C" |