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| author | CHRISTINA L. GRAVES <clgraves@us.ibm.com> | 2017-02-14 16:53:25 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-04-07 14:26:05 -0400 |
| commit | a0db58fa7b5ef607409a565abb43f4e95554af88 (patch) | |
| tree | 7ad66bbc406e172d1aae93d939b63015d630a3fc /src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C | |
| parent | 3cb22e6600aeff0e7620d598fea12e1b7d53e5bf (diff) | |
| download | talos-hostboot-a0db58fa7b5ef607409a565abb43f4e95554af88.tar.gz talos-hostboot-a0db58fa7b5ef607409a565abb43f4e95554af88.zip | |
Fix for HW397129-set bit 52 in the ALTD_OPTION reg to keep MC fastpath enabled
Change-Id: Ifd5be240823ea2ba4fdb6950404b429e33363bd8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36466
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36469
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C index da7486900..a13594784 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C @@ -58,6 +58,7 @@ extern "C" const uint32_t FBC_ALTD_PRE_QUIESCE_COUNT_NUM_OF_BITS = 20; const uint32_t FBC_ALTD_WITH_POST_INIT = 51; + const uint32_t FBC_ALTD_HW397129 = 52; const uint32_t FBC_ALTD_POST_INIT_COUNT_START_BIT = 54; // Bits 54:63 const uint32_t FBC_ALTD_POST_INIT_COUNT_NUM_OF_BITS = 10; @@ -293,6 +294,9 @@ extern "C" FBC_ALTD_POST_INIT_COUNT_NUM_OF_BITS> (INIT_SWITCH_WAIT_COUNT); + //If DD2 setup workaround for HW397129 to re-enable fastpath for DD2 + altd_option_reg_data.setBit<FBC_ALTD_HW397129>(); + // Write to ADU option reg FAPI_DBG("OPTION reg value 0x%016llX", altd_option_reg_data); FAPI_TRY(fapi2::putScom(i_target, PU_ALTD_OPTION_REG, altd_option_reg_data), |
