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| author | Andre Marin <aamarin@us.ibm.com> | 2016-08-18 11:23:12 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2016-09-01 11:56:08 -0400 |
| commit | f09939abc5f6a49147ced7d8bb7e312dc78536ce (patch) | |
| tree | e8c6987a9bbfed9df0dee0b42f9f112653e172cc /src/import/chips/p9/procedures/hwp/memory | |
| parent | ba5c91c6cf7f843d787a80a3c3bef1751a07855d (diff) | |
| download | talos-hostboot-f09939abc5f6a49147ced7d8bb7e312dc78536ce.tar.gz talos-hostboot-f09939abc5f6a49147ced7d8bb7e312dc78536ce.zip | |
Add RCD infrastructure, remove RCD hardcodes from eff_config
Change-Id: Id653734e41e3684deb2307abf4ff9e4ddc230016
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28566
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28920
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
13 files changed, 921 insertions, 535 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C index 80652de2e..7aa8c264b 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C @@ -42,6 +42,7 @@ #include <lib/mss_vpd_decoder.H> #include <lib/spd/spd_factory.H> #include <lib/spd/common/spd_decoder.H> +#include <lib/spd/rdimm/raw_cards.H> #include <lib/eff_config/timing.H> #include <lib/dimm/rank.H> #include <lib/utils/conversions.H> @@ -56,6 +57,29 @@ using fapi2::TARGET_TYPE_MCBIST; namespace mss { +enum rc10_encode : uint8_t +{ + DDR4_1866 = 0x01, + DDR4_2133 = 0x02, + DDR4_2400 = 0x03, + DDR4_2666 = 0x04, +}; + +enum rc13_encode : uint8_t +{ + DIRECT_CS_MODE = 0, + LRDIMM = 0, + RDIMM = 1, +}; + +enum rc3x_encode : uint8_t +{ + MT1860_TO_MT1880 = 0x1F, + MT2120_TO_MT2140 = 0x2C, + MT2380_TO_MT2400 = 0x39, + MT2660_TO_MT2680 = 0x47, +}; + ///////////////////////// // Non-member function implementations ///////////////////////// @@ -131,7 +155,6 @@ fapi_try_exit: }// dram_gen - /// /// @brief Determines & sets effective config for DIMM type from SPD /// @param[in] i_target FAPI2 target @@ -609,10 +632,11 @@ fapi2::ReturnCode eff_config::rcd_mirror_mode(const fapi2::Target<TARGET_TYPE_DI uint8_t l_attrs_mirror_mode[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_rcd_mirror_mode(l_mcs, &l_attrs_mirror_mode[0][0]) ); - FAPI_TRY( iv_pDecoder->iv_module_decoder->register_to_dram_addr_mapping(l_mirror_mode) ); // Update MCS attribute + FAPI_TRY( iv_pDecoder->iv_module_decoder->register_to_dram_addr_mapping(l_mirror_mode) ); l_attrs_mirror_mode[l_port_num][l_dimm_num] = l_mirror_mode; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_RCD_MIRROR_MODE, l_mcs, l_attrs_mirror_mode) ); fapi_try_exit: @@ -767,9 +791,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc00(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc00[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -778,8 +799,14 @@ fapi2::ReturnCode eff_config::dimm_rc00(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc00[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc00(l_mcs, &l_attrs_dimm_rc00[0][0]) ); - l_attrs_dimm_rc00[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc00[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc00; + + FAPI_INF("%s: RC00 settting: %d", c_str(i_target), l_attrs_dimm_rc00[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC00, l_mcs, l_attrs_dimm_rc00) ); fapi_try_exit: @@ -793,9 +820,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc01(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc01[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -804,9 +828,16 @@ fapi2::ReturnCode eff_config::dimm_rc01(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc01[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc01(l_mcs, &l_attrs_dimm_rc01[0][0]) ); - l_attrs_dimm_rc01[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc01[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc01; + + FAPI_INF("%s: RC01 settting: %d", c_str(i_target), l_attrs_dimm_rc01[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC01, l_mcs, l_attrs_dimm_rc01) ); + fapi_try_exit: return fapi2::current_err; } @@ -818,9 +849,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc02(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc02[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -829,9 +857,16 @@ fapi2::ReturnCode eff_config::dimm_rc02(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc02[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc02(l_mcs, &l_attrs_dimm_rc02[0][0]) ); - l_attrs_dimm_rc02[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc02[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc02; + + FAPI_INF("%s: RC02 settting: %d", c_str(i_target), l_attrs_dimm_rc02[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC02, l_mcs, l_attrs_dimm_rc02) ); + fapi_try_exit: return fapi2::current_err; } @@ -843,9 +878,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc03(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc03[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -854,14 +886,41 @@ fapi2::ReturnCode eff_config::dimm_rc03(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + fapi2::buffer<uint8_t> l_buffer; + + uint8_t l_attrs_dimm_rc03[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + uint8_t l_cs_output_drive = 0; + uint8_t l_ca_output_drive = 0; + + FAPI_TRY( iv_pDecoder->iv_module_decoder->cs_signal_output_driver(l_cs_output_drive) ); + FAPI_TRY( iv_pDecoder->iv_module_decoder->ca_signal_output_driver(l_ca_output_drive) ); + + FAPI_INF( "%s: Retrieved register output drive, for CA: %d, CS: %d", + c_str(i_target), l_ca_output_drive, l_cs_output_drive ); + + // Lets construct encoding byte for RCD setting + { + // Buffer insert constants for CS and CA output drive + constexpr size_t CS_START = 4; + constexpr size_t CA_START = 6; + constexpr size_t LEN = 2; + + l_buffer.insertFromRight<CA_START, LEN>(l_ca_output_drive) + .insertFromRight<CS_START, LEN>(l_cs_output_drive); + } + // Retrieve MCS attribute data FAPI_TRY( eff_dimm_ddr4_rc03(l_mcs, &l_attrs_dimm_rc03[0][0]) ); - l_attrs_dimm_rc03[l_port_num][l_dimm_num] = 0x06; + + // Update MCS attribute + l_attrs_dimm_rc03[l_port_num][l_dimm_num] = l_buffer; + + FAPI_INF("%s: RC03 settting: %d", c_str(i_target), l_attrs_dimm_rc03[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC03, l_mcs, l_attrs_dimm_rc03) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC04 /// @param[in] i_target FAPI2 target @@ -869,9 +928,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc04(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc04[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -880,9 +936,38 @@ fapi2::ReturnCode eff_config::dimm_rc04(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + uint8_t l_attrs_dimm_rc04[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + uint8_t l_odt_output_drive = 0; + uint8_t l_cke_output_drive = 0; + + fapi2::buffer<uint8_t> l_buffer; + + FAPI_TRY( iv_pDecoder->iv_module_decoder->odt_signal_output_driver(l_odt_output_drive) ); + FAPI_TRY( iv_pDecoder->iv_module_decoder->cke_signal_output_driver(l_cke_output_drive) ); + + FAPI_INF( "%s: Retrieved signal driver output, for CKE: %d, ODT: %d", + c_str(i_target), l_cke_output_drive, l_odt_output_drive ); + + // Lets construct encoding byte for RCD setting + { + // Buffer insert constants for ODT and CKE output drive + constexpr size_t CKE_START = 6; + constexpr size_t ODT_START = 4; + constexpr size_t LEN = 2; + + l_buffer.insertFromRight<CKE_START, LEN>(l_cke_output_drive) + .insertFromRight<ODT_START, LEN>(l_odt_output_drive); + } + + // Retrieve MCS attribute data FAPI_TRY( eff_dimm_ddr4_rc04(l_mcs, &l_attrs_dimm_rc04[0][0]) ); - l_attrs_dimm_rc04[l_port_num][l_dimm_num] = 0x05; + + // Update MCS attribute + l_attrs_dimm_rc04[l_port_num][l_dimm_num] = l_buffer; + + FAPI_INF("%s: RC04 setting: %d", c_str(i_target), l_attrs_dimm_rc04[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC04, l_mcs, l_attrs_dimm_rc04) ); + fapi_try_exit: return fapi2::current_err; } @@ -894,9 +979,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc05(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc05[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -905,9 +987,38 @@ fapi2::ReturnCode eff_config::dimm_rc05(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + uint8_t l_attrs_dimm_rc05[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + uint8_t l_a_side_output_drive = 0; + uint8_t l_b_side_output_drive = 0; + + fapi2::buffer<uint8_t> l_buffer; + + FAPI_TRY( iv_pDecoder->iv_module_decoder->a_side_clk_output_driver(l_a_side_output_drive) ); + FAPI_TRY( iv_pDecoder->iv_module_decoder->b_side_clk_output_driver(l_b_side_output_drive) ); + + FAPI_INF( "%s: Retrieved register output drive for clock, b-side (Y0,Y2): %d, a-side (Y1,Y3): %d", + c_str(i_target), l_b_side_output_drive, l_a_side_output_drive ); + + { + // Buffer insert constants for ODT and CKE output drive + constexpr size_t B_START = 6; + constexpr size_t A_START = 4; + constexpr size_t LEN = 2; + + // Lets construct encoding byte for RCD setting + l_buffer.insertFromRight<B_START, LEN>(l_b_side_output_drive) + .insertFromRight<A_START, LEN>(l_a_side_output_drive); + } + + // Retrieve MCS attribute data FAPI_TRY( eff_dimm_ddr4_rc05(l_mcs, &l_attrs_dimm_rc05[0][0]) ); - l_attrs_dimm_rc05[l_port_num][l_dimm_num] = 0x05; + + // Update MCS attribute + l_attrs_dimm_rc05[l_port_num][l_dimm_num] = l_buffer; + + FAPI_INF( "%s: RC05 setting: %d", c_str(i_target), l_attrs_dimm_rc05[l_port_num][l_dimm_num] ) FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC05, l_mcs, l_attrs_dimm_rc05) ); + fapi_try_exit: return fapi2::current_err; } @@ -919,9 +1030,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc06_07(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc06_07[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -930,9 +1038,16 @@ fapi2::ReturnCode eff_config::dimm_rc06_07(const fapi2::Target<TARGET_TYPE_DIMM> const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc06_07[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc06_07(l_mcs, &l_attrs_dimm_rc06_07[0][0]) ); - l_attrs_dimm_rc06_07[l_port_num][l_dimm_num] = 0xf; + + // Update MCS attribute + l_attrs_dimm_rc06_07[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc06_07; + + FAPI_INF( "%s: RC06_07 setting: %d", c_str(i_target), l_attrs_dimm_rc06_07[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC06_07, l_mcs, l_attrs_dimm_rc06_07) ); + fapi_try_exit: return fapi2::current_err; } @@ -944,9 +1059,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc08(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc08[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -955,9 +1067,16 @@ fapi2::ReturnCode eff_config::dimm_rc08(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc08[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc08(l_mcs, &l_attrs_dimm_rc08[0][0]) ); - l_attrs_dimm_rc08[l_port_num][l_dimm_num] = 0x3; + + // Update MCS attribute + l_attrs_dimm_rc08[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc08; + + FAPI_INF( "%s: RC08 setting: %d", c_str(i_target), l_attrs_dimm_rc08[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC08, l_mcs, l_attrs_dimm_rc08) ); + fapi_try_exit: return fapi2::current_err; } @@ -969,9 +1088,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc09(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc09[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -980,9 +1096,18 @@ fapi2::ReturnCode eff_config::dimm_rc09(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // TODO - RTC 160118: Clean up eff_config boiler plate that can moved into helper functions + + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc09[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc09(l_mcs, &l_attrs_dimm_rc09[0][0]) ); - l_attrs_dimm_rc09[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc09[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc09; + + FAPI_INF( "%s: RC09 setting: %d", c_str(i_target), l_attrs_dimm_rc09[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC09, l_mcs, l_attrs_dimm_rc09) ); + fapi_try_exit: return fapi2::current_err; } @@ -994,9 +1119,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc10(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc10[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1005,14 +1127,46 @@ fapi2::ReturnCode eff_config::dimm_rc10(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + uint64_t l_freq = 0; + + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc10[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc10(l_mcs, &l_attrs_dimm_rc10[0][0]) ); - l_attrs_dimm_rc10[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + FAPI_TRY( mss::freq( mss::find_target<TARGET_TYPE_MCBIST>(i_target), l_freq ) ); + + switch(l_freq) + { + case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: + l_attrs_dimm_rc10[l_port_num][l_dimm_num] = rc10_encode::DDR4_1866; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: + l_attrs_dimm_rc10[l_port_num][l_dimm_num] = rc10_encode::DDR4_2133; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: + l_attrs_dimm_rc10[l_port_num][l_dimm_num] = rc10_encode::DDR4_2400; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: + l_attrs_dimm_rc10[l_port_num][l_dimm_num] = rc10_encode::DDR4_2666; + break; + + default: + FAPI_ERR("Invalid frequency for rc10 encoding received: %d", l_freq); + return fapi2::FAPI2_RC_FALSE; + break; + } + + FAPI_INF( "%s: RC10 setting: %d", c_str(i_target), l_attrs_dimm_rc10[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC10, l_mcs, l_attrs_dimm_rc10) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC11 /// @param[in] i_target FAPI2 target @@ -1020,9 +1174,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc11(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc11[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1031,9 +1182,16 @@ fapi2::ReturnCode eff_config::dimm_rc11(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc11[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc11(l_mcs, &l_attrs_dimm_rc11[0][0]) ); - l_attrs_dimm_rc11[l_port_num][l_dimm_num] = 0xe; + + // Update MCS attribute + l_attrs_dimm_rc11[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc0b; + + FAPI_INF( "%s: RC11 setting: %d", c_str(i_target), l_attrs_dimm_rc11[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC11, l_mcs, l_attrs_dimm_rc11) ); + fapi_try_exit: return fapi2::current_err; } @@ -1045,9 +1203,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc12(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc12[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1056,9 +1211,16 @@ fapi2::ReturnCode eff_config::dimm_rc12(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc12[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc12(l_mcs, &l_attrs_dimm_rc12[0][0]) ); - l_attrs_dimm_rc12[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc12[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc0c; + + FAPI_INF( "%s: R12 setting: %d", c_str(i_target), l_attrs_dimm_rc12[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC12, l_mcs, l_attrs_dimm_rc12) ); + fapi_try_exit: return fapi2::current_err; } @@ -1070,9 +1232,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc13(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc13[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1081,9 +1240,52 @@ fapi2::ReturnCode eff_config::dimm_rc13(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + uint8_t l_attrs_dimm_rc13[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + fapi2::buffer<uint8_t> l_buffer; + + // TODO - RTC 160116: Fix RC0D chip select setting for LRDIMMs + constexpr uint8_t l_cs_mode = rc13_encode::DIRECT_CS_MODE; + uint8_t l_mirror_mode = 0; + uint8_t l_dimm_type = 0; + uint8_t l_module_type = 0; + + FAPI_TRY( spd::base_module_type(i_target, iv_pDecoder->iv_spd_data, l_module_type) ); + + l_dimm_type = (l_module_type == fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM) ? + rc13_encode::RDIMM : + rc13_encode::LRDIMM; + + FAPI_TRY( iv_pDecoder->iv_module_decoder->register_to_dram_addr_mapping(l_mirror_mode) ); + + // Lets construct encoding byte for RCD setting + { + // CS + constexpr size_t CS_START = 6; + constexpr size_t CS_LEN = 2; + + // DIMM TYPE + constexpr size_t DIMM_TYPE_START = 5; + constexpr size_t DIMM_TYPE_LEN = 1; + + // MIRROR mode + constexpr size_t MIRROR_START = 4; + constexpr size_t MIRROR_LEN = 1; + + l_buffer.insertFromRight<CS_START, CS_LEN>(l_cs_mode) + .insertFromRight<DIMM_TYPE_START, DIMM_TYPE_LEN>(l_dimm_type) + .insertFromRight<MIRROR_START, MIRROR_LEN>(l_mirror_mode); + } + + // Retrieve MCS attribute data FAPI_TRY( eff_dimm_ddr4_rc13(l_mcs, &l_attrs_dimm_rc13[0][0]) ); - l_attrs_dimm_rc13[l_port_num][l_dimm_num] = 0xC; + + // Update MCS attribute + FAPI_TRY( spd::base_module_type(i_target, iv_pDecoder->iv_spd_data, l_dimm_type) ); + l_attrs_dimm_rc13[l_port_num][l_dimm_num] = l_buffer; + + FAPI_INF( "%s: RC13 setting: %d", c_str(i_target), l_attrs_dimm_rc13[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC13, l_mcs, l_attrs_dimm_rc13) ); + fapi_try_exit: return fapi2::current_err; } @@ -1095,9 +1297,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc14(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc14[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1106,9 +1305,16 @@ fapi2::ReturnCode eff_config::dimm_rc14(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc14[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc14(l_mcs, &l_attrs_dimm_rc14[0][0]) ); - l_attrs_dimm_rc14[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc14[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc0e; + + FAPI_INF( "%s: RC14 setting: %d", c_str(i_target), l_attrs_dimm_rc14[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC14, l_mcs, l_attrs_dimm_rc14) ); + fapi_try_exit: return fapi2::current_err; } @@ -1120,9 +1326,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc15(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc15[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1131,15 +1334,20 @@ fapi2::ReturnCode eff_config::dimm_rc15(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc15[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc15(l_mcs, &l_attrs_dimm_rc15[0][0]) ); - l_attrs_dimm_rc15[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc15[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc0f; + + FAPI_INF( "%s: RC15 setting: %d", c_str(i_target), l_attrs_dimm_rc15[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC15, l_mcs, l_attrs_dimm_rc15) ); fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_1x /// @param[in] i_target FAPI2 target @@ -1147,9 +1355,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc1x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_1x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1158,15 +1363,20 @@ fapi2::ReturnCode eff_config::dimm_rc1x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_1x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_1x(l_mcs, &l_attrs_dimm_rc_1x[0][0]) ); - l_attrs_dimm_rc_1x[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_1x[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc1x; + + FAPI_INF( "%s: RC1X setting: %d", c_str(i_target), l_attrs_dimm_rc_1x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_1x, l_mcs, l_attrs_dimm_rc_1x) ); fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_2x /// @param[in] i_target FAPI2 target @@ -1174,9 +1384,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc2x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_2x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1185,14 +1392,20 @@ fapi2::ReturnCode eff_config::dimm_rc2x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_2x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_2x(l_mcs, &l_attrs_dimm_rc_2x[0][0]) ); - l_attrs_dimm_rc_2x[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_2x[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc2x; + + FAPI_INF( "%s: RC2X setting: %d", c_str(i_target), l_attrs_dimm_rc_2x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_2x, l_mcs, l_attrs_dimm_rc_2x) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_3x /// @param[in] i_target FAPI2 target @@ -1200,9 +1413,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc3x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_3x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1211,14 +1421,47 @@ fapi2::ReturnCode eff_config::dimm_rc3x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + uint64_t l_freq = 0; + uint8_t l_attrs_dimm_rc_3x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + + // Retrieve MCS attribute data FAPI_TRY( eff_dimm_ddr4_rc_3x(l_mcs, &l_attrs_dimm_rc_3x[0][0]) ); - l_attrs_dimm_rc_3x[l_port_num][l_dimm_num] = 0x39; + + // Update MCS attribute + FAPI_TRY( freq(find_target<TARGET_TYPE_MCBIST>(l_mcs), l_freq) ); + + switch(l_freq) + { + case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: + l_attrs_dimm_rc_3x[l_port_num][l_dimm_num] = rc3x_encode::MT1860_TO_MT1880; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: + l_attrs_dimm_rc_3x[l_port_num][l_dimm_num] = rc3x_encode::MT2120_TO_MT2140; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: + l_attrs_dimm_rc_3x[l_port_num][l_dimm_num] = rc3x_encode::MT2380_TO_MT2400; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: + l_attrs_dimm_rc_3x[l_port_num][l_dimm_num] = rc3x_encode::MT2660_TO_MT2680; + break; + + default: + FAPI_ERR("Invalid frequency for rc_3x encoding received: %d", l_freq); + return fapi2::FAPI2_RC_FALSE; + break; + } + + FAPI_INF( "%s: RC3X setting: %d", c_str(i_target), l_attrs_dimm_rc_3x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_3x, l_mcs, l_attrs_dimm_rc_3x) ); + + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_4x /// @param[in] i_target FAPI2 target @@ -1226,9 +1469,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc4x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_4x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1237,14 +1477,20 @@ fapi2::ReturnCode eff_config::dimm_rc4x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_4x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_4x(l_mcs, &l_attrs_dimm_rc_4x[0][0]) ); - l_attrs_dimm_rc_4x[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_4x[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc4x; + + FAPI_INF( "%s: RC4X setting: %d", c_str(i_target), l_attrs_dimm_rc_4x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_4x, l_mcs, l_attrs_dimm_rc_4x) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_5x /// @param[in] i_target FAPI2 target @@ -1252,9 +1498,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc5x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_5x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1263,14 +1506,20 @@ fapi2::ReturnCode eff_config::dimm_rc5x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_5x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_5x(l_mcs, &l_attrs_dimm_rc_5x[0][0]) ); - l_attrs_dimm_rc_5x[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_5x[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc5x; + + FAPI_INF( "%s: RC5X setting: %d", c_str(i_target), l_attrs_dimm_rc_5x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_5x, l_mcs, l_attrs_dimm_rc_5x) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_6x /// @param[in] i_target FAPI2 target @@ -1278,9 +1527,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc6x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_6x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1289,14 +1535,20 @@ fapi2::ReturnCode eff_config::dimm_rc6x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_6x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_6x(l_mcs, &l_attrs_dimm_rc_6x[0][0]) ); - l_attrs_dimm_rc_6x[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_6x[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc6x; + + FAPI_INF( "%s: RC6X setting: %d", c_str(i_target), l_attrs_dimm_rc_6x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_6x, l_mcs, l_attrs_dimm_rc_6x) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_7x /// @param[in] i_target FAPI2 target @@ -1344,17 +1596,17 @@ fapi2::ReturnCode eff_config::dimm_rc7x(const fapi2::Target<TARGET_TYPE_DIMM>& i l_rcd7x.insertFromRight<CS_START, LEN>( ibt_helper(l_ibt_cs) ); l_rcd7x.insertFromRight<ODT_START, LEN>( ibt_helper(l_ibt_odt) ); - FAPI_INF("RCD7x for %s is 0x%x", mss::c_str(i_target), uint8_t(l_rcd7x)); - // Now write RCD7x out to the effective attribute FAPI_TRY( eff_dimm_ddr4_rc_7x(l_mcs, &l_attrs_dimm_rc_7x[0][0]) ); l_attrs_dimm_rc_7x[l_port_num][l_dimm_num] = l_rcd7x; + + FAPI_INF( "%s: RC7X setting is 0x%x", mss::c_str(i_target), l_attrs_dimm_rc_7x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_7x, l_mcs, l_attrs_dimm_rc_7x) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_8x /// @param[in] i_target FAPI2 target @@ -1362,9 +1614,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc8x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_8x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1373,14 +1622,20 @@ fapi2::ReturnCode eff_config::dimm_rc8x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_8x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_8x(l_mcs, &l_attrs_dimm_rc_8x[0][0]) ); - l_attrs_dimm_rc_8x[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_8x[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc8x; + + FAPI_INF( "%s: RC8X setting: %d", c_str(i_target), l_attrs_dimm_rc_8x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_8x, l_mcs, l_attrs_dimm_rc_8x) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_9x /// @param[in] i_target FAPI2 target @@ -1388,9 +1643,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rc9x(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_9x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1399,14 +1651,20 @@ fapi2::ReturnCode eff_config::dimm_rc9x(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_9x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_9x(l_mcs, &l_attrs_dimm_rc_9x[0][0]) ); - l_attrs_dimm_rc_9x[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_9x[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rc9x; + + FAPI_INF( "%s: RC9X setting: %d", c_str(i_target), l_attrs_dimm_rc_9x[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_9x, l_mcs, l_attrs_dimm_rc_9x) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_AX /// @param[in] i_target FAPI2 target @@ -1414,9 +1672,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rcax(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_ax[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1425,14 +1680,20 @@ fapi2::ReturnCode eff_config::dimm_rcax(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_ax[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_ax(l_mcs, &l_attrs_dimm_rc_ax[0][0]) ); - l_attrs_dimm_rc_ax[l_port_num][l_dimm_num] = 0x00; + + // Update MCS attribute + l_attrs_dimm_rc_ax[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rcax; + + FAPI_INF( "%s: RCAX setting: %d", c_str(i_target), l_attrs_dimm_rc_ax[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Ax, l_mcs, l_attrs_dimm_rc_ax) ); + fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for DIMM RC_BX /// @param[in] i_target FAPI2 target @@ -1440,9 +1701,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dimm_rcbx(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM - uint8_t l_attrs_dimm_rc_bx[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - // Targets const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target); @@ -1451,8 +1709,14 @@ fapi2::ReturnCode eff_config::dimm_rcbx(const fapi2::Target<TARGET_TYPE_DIMM>& i const auto l_port_num = index(l_mca); const auto l_dimm_num = index(i_target); + // Retrieve MCS attribute data + uint8_t l_attrs_dimm_rc_bx[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; FAPI_TRY( eff_dimm_ddr4_rc_bx(l_mcs, &l_attrs_dimm_rc_bx[0][0]) ); - l_attrs_dimm_rc_bx[l_port_num][l_dimm_num] = 0x07; + + // Update MCS attribute + l_attrs_dimm_rc_bx[l_port_num][l_dimm_num] = iv_pDecoder->iv_raw_card.iv_rcbx; + + FAPI_INF( "%s: RCBX setting: %d", c_str(i_target), l_attrs_dimm_rc_bx[l_port_num][l_dimm_num] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_RC_Bx, l_mcs, l_attrs_dimm_rc_bx) ); fapi_try_exit: @@ -1568,7 +1832,6 @@ fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for cwl /// @param[in] i_target FAPI2 target @@ -1657,7 +1920,6 @@ fapi_try_exit: return fapi2::current_err; } - /// /// @brief Determines & sets effective config for lpasr /// @param[in] i_target FAPI2 target diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C index 9ce5f2e63..fcb0f38e1 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C @@ -42,6 +42,7 @@ // mss lib #include <lib/spd/common/spd_decoder.H> #include <lib/spd/rdimm/rdimm_decoder.H> +#include <lib/spd/rdimm/raw_cards.H> #include <lib/utils/checker.H> #include <lib/utils/c_str.H> #include <lib/utils/find.H> @@ -64,11 +65,16 @@ namespace spd /// @param[in] i_target dimm target /// @param[in] i_spd_data SPD data vector /// @param[in] i_module_decoder shared_ptr to dimm module decoder +/// @param[in] i_raw_card raw card data structure /// decoder::decoder(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data, - const std::shared_ptr<dimm_module_decoder>& i_module_decoder) - : iv_module_decoder(i_module_decoder), iv_spd_data(i_spd_data), iv_target(i_target) + const std::shared_ptr<dimm_module_decoder>& i_module_decoder, + const raw_card_t& i_raw_card) + : iv_module_decoder(i_module_decoder), + iv_spd_data(i_spd_data), + iv_raw_card(i_raw_card), + iv_target(i_target) {} /// diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H index 0e7980781..093e1e906 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H @@ -46,6 +46,7 @@ // mss lib #include <lib/spd/rdimm/rdimm_decoder.H> +#include <lib/spd/rdimm/raw_cards.H> #include <lib/utils/c_str.H> namespace mss @@ -379,6 +380,7 @@ class decoder public: std::shared_ptr<dimm_module_decoder> iv_module_decoder; std::vector<uint8_t> iv_spd_data; + raw_card_t iv_raw_card; // Default constructor deleted decoder() = delete; @@ -388,10 +390,12 @@ class decoder /// @param[in] i_target dimm target /// @param[in] i_spd_data SPD data vector /// @param[in] i_module_decoder shared_ptr to dimm module decoder + /// @param[in] i_raw_card raw pointer to rcd data /// decoder(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data, - const std::shared_ptr<dimm_module_decoder>& i_module_decoder); + const std::shared_ptr<dimm_module_decoder>& i_module_decoder, + const raw_card_t& i_raw_card); /// /// @brief Default dtor @@ -1244,10 +1248,13 @@ class decoder_v1_1 : public decoder /// @brief ctor /// @param[in] i_target dimm target /// @param[in] i_spd_data SPD data vector + /// @param[in] i_module_decoder shared_ptr to dimm module decoder + /// @param[in] i_raw_card raw pointer to rcd data /// decoder_v1_1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data, - const std::shared_ptr<dimm_module_decoder>& i_module_decoder); + const std::shared_ptr<dimm_module_decoder>& i_module_decoder, + const raw_card_t& i_raw_card); /// /// @brief Default dtor diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder_v1_1.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder_v1_1.C index 9af4097ff..340cac41c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder_v1_1.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder_v1_1.C @@ -59,11 +59,14 @@ namespace spd /// @brief ctor /// @param[in] i_target dimm target /// @param[in] i_spd_data SPD data vector +/// @param[in] i_module_decoder shared_ptr to dimm module decoder +/// @param[in] i_raw_card raw card data structure /// decoder_v1_1::decoder_v1_1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data, - const std::shared_ptr<dimm_module_decoder>& i_module_decoder) - : decoder(i_target, i_spd_data, i_module_decoder) + const std::shared_ptr<dimm_module_decoder>& i_module_decoder, + const raw_card_t& i_raw_card) + : decoder(i_target, i_spd_data, i_module_decoder, i_raw_card) {} /// diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C new file mode 100644 index 000000000..0bcf3350a --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C @@ -0,0 +1,132 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file raw_cards.C +/// @brief Raw card data structure +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +// std lib +#include <vector> + +// fapi2 +#include <fapi2.H> + +// mss lib +#include <raw_cards.H> + +namespace mss +{ + +enum raw_card_rev : uint8_t +{ + C1 = 0x22, + + // In the spec hex XF (where X - don't care) + // means no JEDEC reference raw card design used. + // We will want to redefine it to be VBU reference raw card + // since it is unlikely we will use a DIMM w/o a + // reference caw card design. + + // TODO RTC:159662 Fill in valid RCD data for power on + VBU = 0x23, +}; + +// RDIMM raw card C1 +// TODO RTC:159662 Fill in valid RCD data for power on +// +// The following parameters need a valid setting: +// +// RC0E - Parity, NV Mode Enable, and ALERT Configuration Control Word - TK ADD - AAM +// RC0F - Command Latency Adder Control Word - TK ADD - AAM +// RC1x - Internal VrefCA Control Word - TK ADD - AAM +// RC2x - I2C Bus Control Words - TK ADD - AAM +// RC4x - CW Selection Control Words - TK ADD - AAM +// RC5x: CW Destination Selection & Write/Read Additional QxODT[1:0] Signal High - TK ADD - AAM +// RC6x: CW Data Control Word - TK ADD - AAM , +// RC7x: IBT Control Word - TK ADD - AAM +// RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word - TK ADD - AAM +// RC9x: QxODT[1:0] Write Pattern Control Word - TK ADD - AAM +// RCAx: QxODT[1:0] Read Pattern Control Word - TK ADD - AAM +// RCBx: IBT and MRS Snoop Control Word - - TK ADD - AAM +/// +/// @brief raw card C1 settings +/// +raw_card_t raw_card_c1( 0x00, + 0x0B, + 0x00, + 0x0F, + 0x00, + 0x0E, + 0x0E, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00); + +/// +/// @brief raw card VBU settings +/// +raw_card_t raw_card_vbu(0x00, + 0x00, + 0x00, + 0x0F, + 0x03, + 0x00, + 0x0E, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x00, + 0x07 ); + +// TODO - RTC:160121 Catch all for adding raw card data for DIMMs +const std::vector< std::pair< uint8_t , raw_card_t> > RDIMM_RAW_CARDS = +{ + {raw_card_rev::C1, raw_card_c1}, + {raw_card_rev::VBU, raw_card_vbu}, +}; + +}// mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.H new file mode 100644 index 000000000..7e7cd7252 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.H @@ -0,0 +1,151 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/raw_cards.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file raw_cards.H +/// @brief Raw card data structure +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: HB:FSP + +#ifndef _MSS_RAW_CARDS_H_ +#define _MSS_RAW_CARDS_H_ + +#include <fapi2.H> +#include <cstdint> + +namespace mss +{ + +/// +/// @brief raw card VBU settings +/// @note contains RCD settings for hard-coded values +/// that are not application specific. +struct raw_card_t +{ + uint64_t iv_rc00; + uint64_t iv_rc01; + uint64_t iv_rc02; + uint64_t iv_rc03; + uint64_t iv_rc06_07; + uint64_t iv_rc08; + uint64_t iv_rc09; + uint64_t iv_rc0a; + uint64_t iv_rc0b; + uint64_t iv_rc0c; + uint64_t iv_rc0d; + uint64_t iv_rc0e; + uint64_t iv_rc0f; + uint64_t iv_rc1x; + uint64_t iv_rc2x; + uint64_t iv_rc4x; + uint64_t iv_rc5x; + uint64_t iv_rc6x; + uint64_t iv_rc8x; + uint64_t iv_rc9x; + uint64_t iv_rcax; + uint64_t iv_rcbx; + + /// + /// @brief default ctor + /// + raw_card_t() = default; + + /// + /// @brief ctor + /// @param[in] i_rc00 setting for register control word (RC00) + /// @param[in] i_rc01 setting for register control word (RC01) + /// @param[in] i_rc02 setting for register control word (RC02) + /// @param[in] i_rc06_07 setting for register control word (RCO6 & RC07) + /// @param[in] i_rc08 setting for register control word (RC08) + /// @param[in] i_rc09 setting for register control word (RC09) + /// @param[in] i_rc0b setting for register control word (RC0B) + /// @param[in] i_rc0c setting for register control word (RC0C) + /// @param[in] i_rc0e setting for register control word (RC0E) + /// @param[in] i_rc0f setting for register control word (RC0F) + /// @param[in] i_rc1x setting for register control word (RC1X) + /// @param[in] i_rc2x setting for register control word (RC2X) + /// @param[in] i_rc4x setting for register control word (RC4X) + /// @param[in] i_rc5x setting for register control word (RC5X) + /// @param[in] i_rc6x setting for register control word (RC6X) + /// @param[in] i_rc8x setting for register control word (RC8X) + /// @param[in] i_rc9x setting for register control word (RC9X) + /// @param[in] i_rcax setting for register control word (RCAX) + /// @param[in] i_rcbx setting for register control word (RCBX) + /// + raw_card_t( uint64_t i_rc00, + uint64_t i_rc01, + uint64_t i_rc02, + uint64_t i_rc06_07, + uint64_t i_rc08, + uint64_t i_rc09, + uint64_t i_rc0b, + uint64_t i_rc0c, + uint64_t i_rc0e, + uint64_t i_rc0f, + uint64_t i_rc1x, + uint64_t i_rc2x, + uint64_t i_rc4x, + uint64_t i_rc5x, + uint64_t i_rc6x, + uint64_t i_rc8x, + uint64_t i_rc9x, + uint64_t i_rcax, + uint64_t i_rcbx ) + : iv_rc00(i_rc00), + iv_rc01(i_rc01), + iv_rc02(i_rc02), + iv_rc06_07(i_rc06_07), + iv_rc08(i_rc08), + iv_rc09(i_rc09), + iv_rc0b(i_rc0b), + iv_rc0c(i_rc0c), + iv_rc0e(i_rc0e), + iv_rc0f(i_rc0f), + iv_rc1x(i_rc1x), + iv_rc2x(i_rc2x), + iv_rc4x(i_rc4x), + iv_rc5x(i_rc5x), + iv_rc6x(i_rc6x), + iv_rc8x(i_rc8x), + iv_rc9x(i_rc9x), + iv_rcax(i_rcax), + iv_rcbx(i_rcbx) + {} + + /// + /// @brief default dtor + /// + ~raw_card_t() = default; +}; + +extern const std::vector< std::pair< uint8_t, raw_card_t> > RDIMM_RAW_CARDS; + +}// mss + +#endif //_MSS_RAW_CARDS_H_ diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H index bb6cfacd5..e562b3936 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H @@ -147,21 +147,6 @@ class dimm_module_decoder } /// - /// @brief Decodes raw card extension - /// @param[out] o_output raw card rev - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 128 (Bits 7~5) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 48 - /// - virtual fapi2::ReturnCode raw_card_extension(uint8_t& o_output) - { - o_output = 0; - return fapi2::FAPI2_RC_SUCCESS; - } - - /// /// @brief Decodes front module maximum thickness max, in mm /// @param[out] o_output encoding from SPD /// @return FAPI2_RC_SUCCESS if okay @@ -192,51 +177,6 @@ class dimm_module_decoder } /// - /// @brief Decodes reference raw card - /// @param[out] o_output encoding from SPD - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 130 (Bits 4~0) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 49 - /// - virtual fapi2::ReturnCode reference_raw_card(uint8_t& o_output) - { - o_output = 0; - return fapi2::FAPI2_RC_SUCCESS; - } - - /// - /// @brief Decodes reference raw card revision - /// @param[out] o_output encoding from SPD - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 130 (Bits 6~5) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 49 - /// - virtual fapi2::ReturnCode reference_raw_card_rev(uint8_t& o_output) - { - o_output = 0; - return fapi2::FAPI2_RC_SUCCESS; - } - - /// - /// @brief Decodes reference raw card extension - /// @param[out] o_output encoding from SPD - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 130 (Bit 7) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 49 - /// - virtual fapi2::ReturnCode reference_raw_card_extension(uint8_t& o_output) - { - o_output = 0; - return fapi2::FAPI2_RC_SUCCESS; - } - - /// /// @brief Decodes number of registers used on RDIMM /// @param[out] o_output encoding from SPD /// @return FAPI2_RC_SUCCESS if okay @@ -483,17 +423,6 @@ class rdimm_decoder_v1_0 : public dimm_module_decoder virtual fapi2::ReturnCode max_module_nominal_height(uint8_t& o_output) override; /// - /// @brief Decodes raw card extension - /// @param[out] o_output raw card rev - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 128 (Bits 7~5) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 48 - /// - virtual fapi2::ReturnCode raw_card_extension(uint8_t& o_output) override; - - /// /// @brief Decodes front module maximum thickness max, in mm /// @param[out] o_output encoding from SPD /// @return FAPI2_RC_SUCCESS if okay @@ -516,39 +445,6 @@ class rdimm_decoder_v1_0 : public dimm_module_decoder virtual fapi2::ReturnCode back_module_max_thickness(uint8_t& o_output) override; /// - /// @brief Decodes reference raw card - /// @param[out] o_output encoding from SPD - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 130 (Bits 4~0) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 49 - /// - virtual fapi2::ReturnCode reference_raw_card(uint8_t& o_output) override; - - /// - /// @brief Decodes reference raw card revision - /// @param[out] o_output encoding from SPD - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 130 (Bits 6~5) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 49 - /// - virtual fapi2::ReturnCode reference_raw_card_rev(uint8_t& o_output) override; - - /// - /// @brief Decodes reference raw card extension - /// @param[out] o_output encoding from SPD - /// @return FAPI2_RC_SUCCESS if okay - /// @note SPD Byte 130 (Bit 7) - /// @note Item JEDEC Standard No. 21-C - /// @note DDR4 SPD Document Release 2 - /// @note Page 4.1.2.12 - 49 - /// - virtual fapi2::ReturnCode reference_raw_card_extension(uint8_t& o_output) override; - - /// /// @brief Decodes number of registers used on RDIMM /// @param[out] o_output encoding from SPD /// @return FAPI2_RC_SUCCESS if okay diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C index ef9669c7e..b841879f2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C @@ -173,153 +173,6 @@ fapi_try_exit: } /// -/// @brief Decodes raw card extension -/// @param[out] o_output raw card rev -/// @return FAPI2_RC_SUCCESS if okay -/// @note SPD Byte 128 (Bits 7~5) -/// @note Item JEDEC Standard No. 21-C -/// @note DDR4 SPD Document Release 2 -/// @note Page 4.1.2.12 - 48 -/// -fapi2::ReturnCode rdimm_decoder_v1_0::raw_card_extension(uint8_t& o_output) -{ - // Extracting desired bits - constexpr size_t BYTE_INDEX = 130; - uint8_t l_field_bits = extract_spd_field<BYTE_INDEX, RAW_CARD_EXT_START, RAW_CARD_EXT_LEN>(iv_target, iv_spd_data); - - FAPI_INF("Field_Bits value: %d", l_field_bits); - - // This checks my extracting params returns a value within bound - constexpr size_t MAX_VALID_VALUE = 0b111; - - FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target, - l_field_bits <= MAX_VALID_VALUE, - BYTE_INDEX, - l_field_bits, - "Failed bound check for raw card extension") ); - - o_output = l_field_bits; - - FAPI_INF("%s. Raw card extension: %d", - mss::c_str(iv_target), - o_output); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Decodes reference raw card -/// @param[out] o_output encoding from SPD -/// @return FAPI2_RC_SUCCESS if okay -/// @note SPD Byte 130 (Bits 4~0) -/// @note Item JEDEC Standard No. 21-C -/// @note DDR4 SPD Document Release 2 -/// @Note Page 4.1.2.12 - 49 -/// -fapi2::ReturnCode rdimm_decoder_v1_0::reference_raw_card(uint8_t& o_output) -{ - // Extracting desired bits - constexpr size_t BYTE_INDEX = 130; - uint8_t l_field_bits = extract_spd_field<BYTE_INDEX, REF_RAW_CARD_START, REF_RAW_CARD_LEN>(iv_target, iv_spd_data); - - FAPI_INF("Field_Bits value: %d", l_field_bits); - - // This checks my extracting params returns a value within bound - constexpr size_t MAX_VALID_VALUE = 0b11111; - - FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target, - l_field_bits <= MAX_VALID_VALUE, - BYTE_INDEX, - l_field_bits, - "Failed bound check for reference raw card") ); - - o_output = l_field_bits; - - FAPI_INF("%s. Reference raw card: %d", - mss::c_str(iv_target), - o_output); - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Decodes reference raw card revision -/// @param[out] o_output encoding from SPD -/// @return FAPI2_RC_SUCCESS if okay -/// @note SPD Byte 130 (Bits 6~5) -/// @note Item JEDEC Standard No. 21-C -/// @note DDR4 SPD Document Release 2 -/// @note Page 4.1.2.12 - 49 -/// -fapi2::ReturnCode rdimm_decoder_v1_0::reference_raw_card_rev(uint8_t& o_output) -{ - // Extracting desired bits - constexpr size_t BYTE_INDEX = 130; - uint8_t l_field_bits = extract_spd_field<BYTE_INDEX, REF_RAW_CARD_REV_START, REF_RAW_CARD_REV_LEN>(iv_target, - iv_spd_data); - - FAPI_INF("Field_Bits value: %d", l_field_bits); - - // This checks my extracting params returns a value within bound - constexpr size_t MAX_VALID_VALUE = 0b11; - - FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target, - l_field_bits <= MAX_VALID_VALUE, - BYTE_INDEX, - l_field_bits, - "Failed bound check for reference raw card revision") ); - - o_output = l_field_bits; - - FAPI_INF("%s. Reference raw card revision: %d", - mss::c_str(iv_target), - o_output); - -fapi_try_exit: - return fapi2::current_err; - -} - -/// -/// @brief Decodes reference raw card extension -/// @param[out] o_output encoding from SPD -/// @return FAPI2_RC_SUCCESS if okay -/// @note SPD Byte 130 (Bit 7) -/// @note Item JEDEC Standard No. 21-C -/// @note DDR4 SPD Document Release 2 -/// @note Page 4.1.2.12 - 49 -/// -fapi2::ReturnCode rdimm_decoder_v1_0::reference_raw_card_extension(uint8_t& o_output) -{ - // Extracting desired bits - constexpr size_t BYTE_INDEX = 130; - uint8_t l_field_bits = extract_spd_field<BYTE_INDEX, REF_RAW_CARD_EXT_START, REF_RAW_CARD_EXT_LEN>(iv_target, - iv_spd_data); - FAPI_INF("Field_Bits value: %d", l_field_bits); - - // This checks my extracting params returns a value within bound - constexpr size_t MAX_VALID_VALUE = 1; - - FAPI_TRY( mss::check::spd::fail_for_invalid_value(iv_target, - l_field_bits <= MAX_VALID_VALUE, - BYTE_INDEX, - l_field_bits, - "Failed bound check for reference raw card extension") ); - - o_output = l_field_bits; - - FAPI_INF("%s. Reference raw card extension: %d", - mss::c_str(iv_target), - o_output); - -fapi_try_exit: - return fapi2::current_err; - -} - -/// /// @brief Decodes number of registers used on RDIMM /// @param[out] o_output encoding from SPD /// @return FAPI2_RC_SUCCESS if okay diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C index 751b05b4b..53e42df89 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C @@ -43,7 +43,7 @@ // mss lib #include <lib/spd/spd_factory.H> #include <lib/spd/common/spd_decoder.H> - +#include <lib/spd/rdimm/raw_cards.H> #include <lib/utils/checker.H> #include <lib/utils/c_str.H> #include <lib/utils/conversions.H> @@ -52,6 +52,7 @@ using fapi2::TARGET_TYPE_MCA; using fapi2::TARGET_TYPE_MCS; using fapi2::TARGET_TYPE_DIMM; +using fapi2::FAPI2_RC_SUCCESS; namespace mss { @@ -69,7 +70,7 @@ namespace spd /// @note Page 14-15 /// @note DDR4 SPD Document Release 3 /// -fapi2::ReturnCode rev_encoding_level(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, +fapi2::ReturnCode rev_encoding_level(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data, uint8_t& o_value) { @@ -121,7 +122,7 @@ fapi_try_exit: /// @note Page 14-15 /// @note DDR4 SPD Document Release 3 /// -fapi2::ReturnCode rev_additions_level(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, +fapi2::ReturnCode rev_additions_level(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data, uint8_t& o_value) { @@ -285,6 +286,99 @@ fapi_try_exit: } /// +/// @brief Decodes reference raw card +/// @param[in] i_target dimm target +/// @param[in] i_spd_data SPD data +/// @param[out] o_output encoding from SPD +/// @return FAPI2_RC_SUCCESS if okay +/// @note SPD Byte 130 (Bits 7~0) +/// @note Item JEDEC Standard No. 21-C +/// @note DDR4 SPD Document Release 2 +/// @Note Page 4.1.2.12 - 49 +/// +fapi2::ReturnCode reference_raw_card(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, + const std::vector<uint8_t>& i_spd_data, + uint8_t& o_output) +{ + // Extracting desired bits + constexpr size_t BYTE_INDEX = 130; + + // Trace in the front assists w/ debug + FAPI_INF("%s SPD data at Byte %d: 0x%llX.", + mss::c_str(i_target), + BYTE_INDEX, + i_spd_data[BYTE_INDEX]); + + // Byte taken directly, all bits are an encoding value so no fail check + o_output = i_spd_data[BYTE_INDEX]; + + FAPI_INF("%s. Reference raw card: %d", + mss::c_str(i_target), + o_output); + + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Helper function to set dimm type attribute +/// @param[in] i_target dimm target +/// @param[in] i_spd_data SPD data +/// @param[out] o_dimm_type dimm type encoding needed by factory +/// @return FAPI2_RC_SUCCESS if okay +/// +static fapi2::ReturnCode dimm_type_setter(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, + const std::vector<uint8_t>& i_spd_data, + uint8_t& o_dimm_type) +{ + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + const auto l_dimm_num = index(i_target); + const auto l_mcs = mss::find_target<TARGET_TYPE_MCS>(i_target); + + // Get dimm type & set attribute (needed by c_str) + uint8_t l_dimm_types_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + + FAPI_TRY( base_module_type(i_target, i_spd_data, o_dimm_type), + "Failed to find base module type" ); + FAPI_TRY( eff_dimm_type(l_mcs, &l_dimm_types_mcs[0][0]) ); + + l_dimm_types_mcs[l_port_num][l_dimm_num] = o_dimm_type; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_dimm_types_mcs) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Helper function to set dram gen attribute +/// @param[in] i_target dimm target +/// @param[in] i_spd_data SPD data +/// @return FAPI2_RC_SUCCESS if okay +/// +static fapi2::ReturnCode dram_gen_setter(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, + const std::vector<uint8_t>& i_spd_data) +{ + const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); + const auto l_dimm_num = index(i_target); + const auto l_mcs = mss::find_target<TARGET_TYPE_MCS>(i_target); + + // Get dram generation & set attribute (needed by c_str) + uint8_t l_dram_gen = 0; + uint8_t l_dram_gen_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; + + FAPI_TRY( eff_dram_gen(l_mcs, &l_dram_gen_mcs[0][0]) ); + FAPI_TRY( dram_device_type(i_target, i_spd_data, l_dram_gen), + "Failed to find base module type" ); + + l_dram_gen_mcs[l_port_num][l_dimm_num] = l_dram_gen; + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_dram_gen_mcs) ); + +fapi_try_exit: + return fapi2::current_err; + +} + +/// /// @brief Object factory to select correct decoder /// @param[in] i_target dimm target /// @param[in] i_spd_data SPD data @@ -292,124 +386,110 @@ fapi_try_exit: /// @return FAPI2_RC_SUCCESS if okay /// @note Factory dependent on SPD revision & dimm type /// -fapi2::ReturnCode factory(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, +fapi2::ReturnCode factory(const fapi2::Target<TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data, std::shared_ptr<decoder>& o_fact_obj) { if( i_spd_data.empty() ) { // This won't work with no data + FAPI_ERR( "SPD vector of data is empty! Factory requires valid SPD data."); return fapi2::FAPI2_RC_INVALID_PARAMETER; } - const auto l_mcs = mss::find_target<TARGET_TYPE_MCS>(i_target); - const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); - const auto l_dimm_num = index(i_target); + std::shared_ptr<dimm_module_decoder> l_module_decoder; uint8_t l_dimm_type = 0; - + uint8_t l_encoding_rev = 0; + uint8_t l_additions_rev = 0; + uint8_t l_ref_raw_card_rev = 0; + raw_card_t l_raw_card; + + // Attribute setting needed by mss::c_str() which is used in + // the SPD decoder for debugging help + FAPI_TRY( dimm_type_setter(i_target, i_spd_data, l_dimm_type) ); + FAPI_TRY( dram_gen_setter(i_target, i_spd_data) ); + + // Get revision levels to figure out what SPD version we are + FAPI_TRY( rev_encoding_level(i_target, i_spd_data, l_encoding_rev), + "Failed to find encoding level" ); + FAPI_TRY( rev_additions_level(i_target, i_spd_data, l_additions_rev), + "Failed to find additons level" ); + + // Lets find out what raw card we are and grab the right + // raw card settings + FAPI_TRY( reference_raw_card(i_target, i_spd_data, l_ref_raw_card_rev) ); + + if( !find_value_from_key(RDIMM_RAW_CARDS, l_ref_raw_card_rev, l_raw_card) ) { - // Get dimm type & set attribute (needed by c_str) - uint8_t l_dimm_types_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - FAPI_TRY( base_module_type(i_target, i_spd_data, l_dimm_type), - "Failed to find base module type" ); - FAPI_TRY( eff_dimm_type(l_mcs, &l_dimm_types_mcs[0][0]) ); - - l_dimm_types_mcs[l_port_num][l_dimm_num] = l_dimm_type; - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_TYPE, l_mcs, l_dimm_types_mcs) ); + FAPI_ERR( "Invalid reference raw card recieved: %d", l_ref_raw_card_rev ); + return fapi2::FAPI2_RC_FALSE; } + // Get decoder object needed for current dimm type and spd rev + switch(l_dimm_type) { - // Get dram generation & set attribute (needed by c_str) - uint8_t l_dram_gen = 0; - uint8_t l_dram_gen_mcs[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; - - FAPI_TRY( eff_dram_gen(l_mcs, &l_dram_gen_mcs[0][0]) ); - FAPI_TRY( dram_device_type(i_target, i_spd_data, l_dram_gen), - "Failed to find base module type" ); - - l_dram_gen_mcs[l_port_num][l_dimm_num] = l_dram_gen; - - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_GEN, l_mcs, l_dram_gen_mcs) ); - } - - { - std::shared_ptr<dimm_module_decoder> l_module_decoder; - uint8_t l_encoding_rev = 0; - uint8_t l_additions_rev = 0; - - // Get revision levels - FAPI_TRY( rev_encoding_level(i_target, i_spd_data, l_encoding_rev), - "Failed to find encoding level" ); - FAPI_TRY( rev_additions_level(i_target, i_spd_data, l_additions_rev), - "Failed to find additons level" ); - - // Get decoder object needed for current dimm type and spd rev - switch(l_dimm_type) - { - // Each dimm type rev is independent - case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM: - - // SPD Revision format #.# - // 1st # = encoding level - // 2nd # = additions level - switch(l_encoding_rev) - { - // Skipping case 0 since we shouldn't be using pre-production revisions - case 1: - switch(l_additions_rev) - { - // Rev 1.0 - case 0: - // Life starts out at base revision level - l_module_decoder = std::make_shared<rdimm_decoder_v1_0>(i_target, i_spd_data); - o_fact_obj = std::make_shared<decoder>( i_target, i_spd_data, l_module_decoder ); - break; - - case 1: - // Rev 1.1 - // Changes to both the general section & rdimm section occured - l_module_decoder = std::make_shared<rdimm_decoder_v1_1>(i_target, i_spd_data); - o_fact_obj = std::make_shared<decoder_v1_1>( i_target, i_spd_data, l_module_decoder ); - break; - - default: - FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, - l_dimm_type, - l_encoding_rev, - l_additions_rev, - "Additions Level Unsupported!") ); - break; - }//end additions - - break; - - default: - FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, - l_dimm_type, - l_encoding_rev, - l_additions_rev, - "Encoding Level Unsupported!") ); - break; - }// end encodings - - break; - - default: - FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, - l_dimm_type, - l_encoding_rev, - l_additions_rev, - "DIMM Type Unsupported!") ); - break; - - } // end dimm type - - FAPI_INF("%s: Decoder created SPD revision %d.%d", - c_str(i_target), - l_encoding_rev, - l_additions_rev); - } + // Each dimm type rev is independent + case fapi2::ENUM_ATTR_EFF_DIMM_TYPE_RDIMM: + + // SPD Revision format #.# + // 1st # = encoding level + // 2nd # = additions level + switch(l_encoding_rev) + { + // Skipping case 0 since we shouldn't be using pre-production revisions + case 1: + switch(l_additions_rev) + { + // Rev 1.0 + case 0: + // Life starts out at base revision level + l_module_decoder = std::make_shared<rdimm_decoder_v1_0>(i_target, i_spd_data); + o_fact_obj = std::make_shared<decoder>( i_target, i_spd_data, l_module_decoder, l_raw_card ); + break; + + case 1: + // Rev 1.1 + // Changes to both the general section & rdimm section occured + l_module_decoder = std::make_shared<rdimm_decoder_v1_1>(i_target, i_spd_data); + o_fact_obj = std::make_shared<decoder_v1_1>( i_target, i_spd_data, l_module_decoder, l_raw_card ); + break; + + default: + FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, + l_dimm_type, + l_encoding_rev, + l_additions_rev, + "Additions Level Unsupported!") ); + break; + }//end additions + + break; + + default: + FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, + l_dimm_type, + l_encoding_rev, + l_additions_rev, + "Encoding Level Unsupported!") ); + break; + }// end encodings + + break; + + default: + FAPI_TRY( mss::check::spd::invalid_factory_sel(i_target, + l_dimm_type, + l_encoding_rev, + l_additions_rev, + "DIMM Type Unsupported!") ); + break; + + } // end dimm type + + FAPI_INF("%s: Decoder created SPD revision %d.%d", + c_str(i_target), + l_encoding_rev, + l_additions_rev); fapi_try_exit: return fapi2::current_err; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H index d0113227e..11441b694 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.H @@ -109,6 +109,21 @@ fapi2::ReturnCode dram_device_type(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& uint8_t& o_value); /// +/// @brief Decodes reference raw card +/// @param[in] i_target dimm target +/// @param[in] i_spd_data SPD data +/// @param[out] o_output encoding from SPD +/// @return FAPI2_RC_SUCCESS if okay +/// @note SPD Byte 130 (Bits 7~0) +/// @note Item JEDEC Standard No. 21-C +/// @note DDR4 SPD Document Release 2 +/// @Note Page 4.1.2.12 - 49 +/// +fapi2::ReturnCode reference_raw_card(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const std::vector<uint8_t>& i_spd_data, + uint8_t& o_output); + +/// /// @brief Object factory to select correct decoder /// @param[in] i_target dimm target /// @param[in] i_spd_data SPD data diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C index 49e8c28a7..5b2a3a7c4 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C @@ -95,7 +95,7 @@ static constexpr uint8_t vbu_spd[] = //112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0xB5, 0x00, 0xC9, 0xC9, 0xC9, 0xE7, 0xD6, 0xCA, 0x91, //128 - 0x11, 0x11, 0x23, 0x05, 0x00, 0x80, 0xB3, 0x30, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x11, 0x11, 0x23, 0x05, 0x00, 0x80, 0xB3, 0x30, 0x01, 0x65, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/find.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/find.H index 4b113a5ab..235eded6a 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/find.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/find.H @@ -290,20 +290,21 @@ bool find_value_from_key(const std::vector<std::pair<T, OT> >& i_vector_of_pairs OT& o_value) { // Comparator lambda expression - auto compare = [](const std::pair<T, OT>& i_lhs, const T & i_value) + const auto compare = [](const std::pair<T, OT>& i_lhs, const T & i_value) { return (i_lhs.first < i_value); }; // Find iterator to matching key (if it exists) - auto l_value_iterator = std::lower_bound(i_vector_of_pairs.begin(), - i_vector_of_pairs.end(), - i_key, - compare); + const auto l_value_iterator = std::lower_bound(i_vector_of_pairs.begin(), + i_vector_of_pairs.end(), + i_key, + compare); // Did you find it? Let me know. if( (l_value_iterator == i_vector_of_pairs.end()) || (i_key != l_value_iterator->first) ) { + FAPI_ERR("Did not find a mapping value to key: %d", i_key); return false; } @@ -323,9 +324,10 @@ bool find_value_from_key(const std::vector<std::pair<T, OT> >& i_vector_of_pairs /// @return the value corresponding to the key /// @note To use on short arrays. O(N), simple search /// - template<typename T, typename OT, size_t N> -fapi2::ReturnCode find_value_from_key( const std::pair<T, OT> (&i_array)[N], const T& i_key, OT& o_value) +fapi2::ReturnCode find_value_from_key( const std::pair<T, OT> (&i_array)[N], + const T& i_key, + OT& o_value) { // TK Use sort and binary search for larger arrays if (i_array == nullptr) diff --git a/src/import/chips/p9/procedures/hwp/memory/tests/mss_rdimm_decoder_ut.C b/src/import/chips/p9/procedures/hwp/memory/tests/mss_rdimm_decoder_ut.C index 21a201c22..cf7afb6c5 100644 --- a/src/import/chips/p9/procedures/hwp/memory/tests/mss_rdimm_decoder_ut.C +++ b/src/import/chips/p9/procedures/hwp/memory/tests/mss_rdimm_decoder_ut.C @@ -167,16 +167,6 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm { ////////////////////////////// - /// SPD Byte 128 (Bits 7~5) - ///////////////////////////// - uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x1; // from VBU fake SPD - REQUIRE_FALSE( l_decoder.raw_card_extension(l_decoder_output) ); - REQUIRE( l_expected == l_decoder_output); - } - - { - ////////////////////////////// /// SPD Byte 129 (Bits 3~0) ///////////////////////////// uint8_t l_decoder_output = 0; @@ -197,31 +187,11 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm { ////////////////////////////// - /// SPD Byte 130 (Bits 4~0) - ///////////////////////////// - uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x3; // from VBU fake SPD - REQUIRE_FALSE( l_decoder.reference_raw_card(l_decoder_output) ); - REQUIRE( l_expected == l_decoder_output); - } - - { - ////////////////////////////// - /// SPD Byte 130 (Bits 6~5) + /// SPD Byte 130 (Bits 7~0) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x1; // from VBU fake SPD - REQUIRE_FALSE( l_decoder.reference_raw_card_rev(l_decoder_output) ); - REQUIRE( l_expected == l_decoder_output); - } - - { - ////////////////////////////// - /// SPD Byte 130 (Bit 7) - ///////////////////////////// - uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD - REQUIRE_FALSE( l_decoder.reference_raw_card_extension(l_decoder_output) ); + uint8_t l_expected = 0x23; // from VBU fake SPD + REQUIRE_FALSE( spd::reference_raw_card(l_dimm, l_spd, l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -310,7 +280,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 137 (Bits 1~0) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.cke_signal_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -320,7 +290,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 137 (Bits 3~2) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.odt_signal_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -330,7 +300,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 137 (Bits 5~4) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x2; // from VBU fake SPD REQUIRE_FALSE( l_decoder.ca_signal_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -340,7 +310,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 137 (Bits 7~6) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.cs_signal_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -350,7 +320,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 138 (Bits 1~0) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.b_side_clk_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -360,7 +330,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 138 (Bits 3~2) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.a_side_clk_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -512,7 +482,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 137 (Bits 1~0) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.cke_signal_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -522,18 +492,27 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 137 (Bits 3~2) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.odt_signal_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } + { + ////////////////////////////// + /// SPD Byte 137 (Bits 5~4) + ///////////////////////////// + uint8_t l_decoder_output = 0; + uint8_t l_expected = 0x2; // from VBU fake SPD + REQUIRE_FALSE( l_decoder.ca_signal_output_driver( l_decoder_output) ); + REQUIRE( l_expected == l_decoder_output); + } { ////////////////////////////// /// SPD Byte 137 (Bits 7~6) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x01; // from VBU fake SPD REQUIRE_FALSE( l_decoder.cs_signal_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -543,7 +522,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 138 (Bits 1~0) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.b_side_clk_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } @@ -553,7 +532,7 @@ SCENARIO_METHOD(mcbist_target_test_fixture, "Verify RDIMM SPD Decoding", "[rdimm /// SPD Byte 138 (Bits 3~2) ///////////////////////////// uint8_t l_decoder_output = 0; - uint8_t l_expected = 0x0; // from VBU fake SPD + uint8_t l_expected = 0x1; // from VBU fake SPD REQUIRE_FALSE( l_decoder.a_side_clk_output_driver( l_decoder_output) ); REQUIRE( l_expected == l_decoder_output); } |
