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| author | Louis Stermole <stermole@us.ibm.com> | 2016-08-17 07:51:14 -0500 |
|---|---|---|
| committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-08-22 13:49:47 -0400 |
| commit | 4cb8fb9c949f37cad8a4225014891c42a92351e7 (patch) | |
| tree | 016ff0888a032fc97c6010d51521615c48680b5e /src/import/chips/p9/procedures/hwp/memory | |
| parent | b692f91c173ca684b557b8f76d268720e58b36a4 (diff) | |
| download | talos-hostboot-4cb8fb9c949f37cad8a4225014891c42a92351e7.tar.gz talos-hostboot-4cb8fb9c949f37cad8a4225014891c42a92351e7.zip | |
Adding defaults for DRAM dll_reset and dll_enable
Change-Id: I20ca9a344a4002bf052df5c0a98e8e31031a8338
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28417
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28418
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
3 files changed, 6 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C index 179746c14..ec0d77f72 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C @@ -57,7 +57,7 @@ namespace ddr4 mrs00_data::mrs00_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, fapi2::ReturnCode& o_rc ): iv_burst_length(0), iv_read_burst_type(0), - iv_dll_reset(0), + iv_dll_reset(fapi2::ENUM_ATTR_EFF_DRAM_DLL_RESET_NO), iv_test_mode(0), iv_write_recovery(0), iv_cas_latency(0) diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C index 8e32f68c0..71f1fa0d5 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs01.C @@ -55,7 +55,7 @@ namespace ddr4 /// @param[out] fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok /// mrs01_data::mrs01_data( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, fapi2::ReturnCode& o_rc ): - iv_dll_enable(0), + iv_dll_enable(fapi2::ENUM_ATTR_EFF_DRAM_DLL_ENABLE_YES), iv_odic(0), iv_additive_latency(0), iv_wl_enable(0), diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C index dc0717e52..f3bbdaf84 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C @@ -1655,7 +1655,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dll_reset(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dll_reset[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Targets @@ -1668,7 +1667,8 @@ fapi2::ReturnCode eff_config::dll_reset(const fapi2::Target<TARGET_TYPE_DIMM>& i FAPI_TRY( eff_dram_dll_reset(l_mcs, &l_attrs_dll_reset[0][0]) ); - l_attrs_dll_reset[l_port_num][l_dimm_num] = 0x01; + // Default is to not reset DLLs during IPL. + l_attrs_dll_reset[l_port_num][l_dimm_num] = fapi2::ENUM_ATTR_EFF_DRAM_DLL_RESET_NO; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_DLL_RESET, l_mcs, l_attrs_dll_reset), "Failed setting attribute for BL"); @@ -1684,7 +1684,6 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::dll_enable(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { - // TK - RIT skeleton. Need to finish - AAM uint8_t l_attrs_dll_enable[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Targets @@ -1697,7 +1696,8 @@ fapi2::ReturnCode eff_config::dll_enable(const fapi2::Target<TARGET_TYPE_DIMM>& FAPI_TRY( eff_dram_dll_enable(l_mcs, &l_attrs_dll_enable[0][0]) ); - l_attrs_dll_enable[l_port_num][l_dimm_num] = 0x00; + // Enable DLLs by default. + l_attrs_dll_enable[l_port_num][l_dimm_num] = fapi2::ENUM_ATTR_EFF_DRAM_DLL_ENABLE_YES; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_DLL_ENABLE, l_mcs, l_attrs_dll_enable), "Failed setting attribute for BL"); |
