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| author | Joe McGill <jmcgill@us.ibm.com> | 2016-09-16 10:39:42 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-25 13:22:56 -0400 |
| commit | 2856b337830546350cd6ce9b578a83a72c014d58 (patch) | |
| tree | a4e4adbfb885cf09b311c742eeca1524681b5b8f /src/import/chips/p9/procedures/hwp/memory | |
| parent | d41642ca8cededf3ac1727fcfdc7329e1ebb790c (diff) | |
| download | talos-hostboot-2856b337830546350cd6ce9b578a83a72c014d58.tar.gz talos-hostboot-2856b337830546350cd6ce9b578a83a72c014d58.zip | |
adjust DEFAULT_POLL_LIMIT for VBU mc model
Change-Id: I111db437a019d3c6bcd44d39a76357e9cd1df95c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29842
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29847
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index 000534086..7477f683d 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -54,7 +54,7 @@ enum sizes MAX_PRIMARY_RANKS_PER_PORT = 4, MAX_MRANK_PER_PORT = MAX_DIMM_PER_PORT * MAX_RANK_PER_DIMM, RANK_MID_POINT = 4, ///< Which rank number indicates the switch to the other DIMM - DEFAULT_POLL_LIMIT = 10, ///< the number of poll attempts in the event we can't calculate another + DEFAULT_POLL_LIMIT = 20, ///< the number of poll attempts in the event we can't calculate another MAX_NUM_IMP = 4, ///< number of impedances valid per slew type MAX_NUM_CAL_SLEW_RATES = 4, ///< 3V/ns, 4V/ns, 5V/ns, 6V/n MAX_DQ_BITS = 72, /// TODO RTC:157753 This is Nimbus specific. Should be attribute/trait of processor. |
