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author | Brian Silver <bsilver@us.ibm.com> | 2016-07-06 07:12:54 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-07-13 14:20:17 -0400 |
commit | 1be7eab90246335fa2293ab5376643d5ec6873ce (patch) | |
tree | 09ee9db11701a02190dd7abffeb5db06f66a5b3c /src/import/chips/p9/procedures/hwp/memory | |
parent | b45bea7a87b2625ce2b814f6b550f3850cdda4b5 (diff) | |
download | talos-hostboot-1be7eab90246335fa2293ab5376643d5ec6873ce.tar.gz talos-hostboot-1be7eab90246335fa2293ab5376643d5ec6873ce.zip |
Add mcbist steer subtest
Change-Id: Ice1f653b303cefc75542871c6c8285e6a10a1d97
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26669
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26670
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H index 0e678fb79..29af7ba94 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H @@ -221,6 +221,15 @@ class subtest_t {} /// + /// @brief Convert to a 16 bit int + /// @return the subtest as a 16 bit integer, useful for testing + /// + inline operator uint16_t() + { + return uint16_t(iv_mcbmr); + } + + /// /// @brief Complement the data for the first subcommand /// @param[in] i_state the desired state (mss::ON or mss::OFF) /// @return void @@ -476,6 +485,39 @@ inline subtest_t<T> scrub_subtest() } /// +/// @brief Return a steer subtest - configured simply +/// @tparam T the fapi2::TargetType - derived +/// @tparam TT the mcbistTraits associated with T - derived +/// @return mss::mcbist::subtest_t +/// @note Turns on ECC mode for the returned subtest - caller can turn it off +/// @note Configures for start/end address select bit as address config register 0 +/// +template< fapi2::TargetType T, typename TT = mcbistTraits<T> > +inline subtest_t<T> steer_subtest() +{ + // Starts life full of 0's + subtest_t<T> l_subtest; + + // 0:3 = 1010 - we want subtest type to be a Steer + l_subtest.iv_mcbmr.template insertFromRight<TT::OP_TYPE, TT::OP_TYPE_LEN>(op_type::STEER_RW); + + // - Not a special subtest, so no other configs associated + // 4 = 0 - we don't want to complement data for our Writes + // 5:6 = 00 - don't know whether we complement 2nd and 3rd subcommand, caller to fix + // 7 = 0 - forward address generation + // 8 = 0 - non random address generation + // - Don't need to set up anything for LFSRs + // 9:11 = 000 - Fixed data mode + + // 14:15 = 0 address select config registers 0 + + // By default we want to turn on ECC. Caller can turn it off. + l_subtest.change_ecc_mode(mss::ON); + + return l_subtest; +} + +/// /// @brief Return a read subtest - configured simply /// @tparam T the fapi2::TargetType - derived /// @tparam TT the mcbistTraits associated with T - derived |