Add VPD decode and attributes for DQ and CKE maps

  Fix include path in raw_card.C

Change-Id: I1d02ed92d11667e639e832be72a86cdec5035a90
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29222
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29224
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

6 files changed, 420 insertions, 3 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
index aeab68657..6a5c4a1b0 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C
@@ -3491,6 +3491,8 @@ fapi_try_exit:
 fapi2::ReturnCode eff_config::decode_vpd(const fapi2::Target<TARGET_TYPE_MCS>& i_target)
 {
     uint8_t l_mr_blob[mss::VPD_KEYWORD_MAX] = {0};
+    uint8_t l_cke_blob[mss::VPD_KEYWORD_MAX] = {0};
+    uint8_t l_dq_blob[mss::VPD_KEYWORD_MAX] = {0};
     std::vector<uint8_t*> l_mt_blobs(PORTS_PER_MCS, nullptr);
 
     // For sanity. Not sure this will break us, but we're certainly making assumptions below.
@@ -3580,7 +3582,39 @@ fapi2::ReturnCode eff_config::decode_vpd(const fapi2::Target<TARGET_TYPE_MCS>& i
         }
     }
 
-    FAPI_TRY( mss::eff_decode(i_target, l_mt_blobs, l_mr_blob) );
+    // Get CKE data
+    {
+        fapi2::VPDInfo<fapi2::TARGET_TYPE_MCS> l_vpd_info(fapi2::MemVpdData::CK);
+
+        // Check the max for giggles. Programming bug so we should assert.
+        FAPI_TRY( mss::getVPD(i_target, l_vpd_info, nullptr) );
+
+        if (l_vpd_info.iv_size > mss::VPD_KEYWORD_MAX)
+        {
+            FAPI_ERR("VPD MR keyword is too big for our array");
+            fapi2::Assert(false);
+        }
+
+        FAPI_TRY( mss::getVPD(i_target, l_vpd_info, &(l_cke_blob[0])) );
+    }
+
+    // Get DQ data
+    {
+        fapi2::VPDInfo<fapi2::TARGET_TYPE_MCS> l_vpd_info(fapi2::MemVpdData::DQ);
+
+        // Check the max for giggles. Programming bug so we should assert.
+        FAPI_TRY( mss::getVPD(i_target, l_vpd_info, nullptr) );
+
+        if (l_vpd_info.iv_size > mss::VPD_KEYWORD_MAX)
+        {
+            FAPI_ERR("VPD MR keyword is too big for our array");
+            fapi2::Assert(false);
+        }
+
+        FAPI_TRY( mss::getVPD(i_target, l_vpd_info, &(l_dq_blob[0])) );
+    }
+
+    FAPI_TRY( mss::eff_decode(i_target, l_mt_blobs, l_mr_blob, l_cke_blob, l_dq_blob) );
 
 fapi_try_exit:
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 685b43d58..ddd7b3611 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -25889,6 +25889,168 @@ fapi_try_exit:
 }
 
 
+///
+/// @brief ATTR_MSS_VPD_CKE_MAP getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
+/// @param[out] uint8_t* memory to store the value
+/// @note Generated by gen_accessors.pl generateParameters (A)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  The Memory Clock Enable MAP is a bit map describing the Memory Clock Enable
+/// signal to its respective rank. There are 8 bits, but only 4 are currently used
+/// [DIMM0 CKE0][DIMM0 CKE1][N/A][N/A][DIMM1 CKE0][DIMM1 CKE1][N/A][N/A] E.g. 0x80
+/// -> 0b10000000, which means DIMM0 CKE0 is mapped to that
+/// rank.
+///
+inline fapi2::ReturnCode vpd_cke_map(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array)
+{
+    if (o_array == nullptr)
+    {
+        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
+        return fapi2::FAPI2_RC_INVALID_PARAMETER;
+    }
+
+    uint8_t l_value[2][2][4];
+    auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
+    auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VPD_CKE_MAP, l_mcs, l_value) );
+    memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 4);
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MSS_VPD_CKE_MAP: 0x%lx (target: %s)",
+             uint64_t(fapi2::current_err), mss::c_str(i_target));
+    return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MSS_VPD_CKE_MAP getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
+/// @param[out] uint8_t* memory to store the value
+/// @note Generated by gen_accessors.pl generateParameters (B)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  The Memory Clock Enable MAP is a bit map describing the Memory Clock Enable
+/// signal to its respective rank. There are 8 bits, but only 4 are currently used
+/// [DIMM0 CKE0][DIMM0 CKE1][N/A][N/A][DIMM1 CKE0][DIMM1 CKE1][N/A][N/A] E.g. 0x80
+/// -> 0b10000000, which means DIMM0 CKE0 is mapped to that
+/// rank.
+///
+inline fapi2::ReturnCode vpd_cke_map(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+{
+    if (o_array == nullptr)
+    {
+        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
+        return fapi2::FAPI2_RC_INVALID_PARAMETER;
+    }
+
+    uint8_t l_value[2][2][4];
+    auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VPD_CKE_MAP, l_mcs, l_value) );
+    memcpy(o_array, &(l_value[mss::index(i_target)][0]), 8);
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MSS_VPD_CKE_MAP: 0x%lx (target: %s)",
+             uint64_t(fapi2::current_err), mss::c_str(i_target));
+    return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MSS_VPD_CKE_MAP getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
+/// @param[out] uint8_t* memory to store the value
+/// @note Generated by gen_accessors.pl generateParameters (C)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  The Memory Clock Enable MAP is a bit map describing the Memory Clock Enable
+/// signal to its respective rank. There are 8 bits, but only 4 are currently used
+/// [DIMM0 CKE0][DIMM0 CKE1][N/A][N/A][DIMM1 CKE0][DIMM1 CKE1][N/A][N/A] E.g. 0x80
+/// -> 0b10000000, which means DIMM0 CKE0 is mapped to that
+/// rank.
+///
+inline fapi2::ReturnCode vpd_cke_map(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+{
+    if (o_array == nullptr)
+    {
+        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
+        return fapi2::FAPI2_RC_INVALID_PARAMETER;
+    }
+
+    uint8_t l_value[2][2][4];
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VPD_CKE_MAP, i_target, l_value) );
+    memcpy(o_array, &l_value, 16);
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MSS_VPD_CKE_MAP: 0x%lx (target: %s)",
+             uint64_t(fapi2::current_err), mss::c_str(i_target));
+    return fapi2::current_err;
+}
+
+
+///
+/// @brief ATTR_MSS_VPD_DQ_MAP getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
+/// @param[out] uint8_t* memory to store the value
+/// @note Generated by gen_accessors.pl generateParameters (G)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  [PORT][Dimm DQ PIN] The map from the Dual Inline Memory Module (DIMM) Data (DQ)
+/// Pin to the Module Package Data (DQ)
+/// Pinout
+///
+inline fapi2::ReturnCode vpd_dq_map(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
+{
+    if (o_array == nullptr)
+    {
+        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
+        return fapi2::FAPI2_RC_INVALID_PARAMETER;
+    }
+
+    uint8_t l_value[2][72];
+    auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VPD_DQ_MAP, l_mcs, l_value) );
+    memcpy(o_array, &(l_value[mss::index(i_target)][0]), 72);
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MSS_VPD_DQ_MAP: 0x%lx (target: %s)",
+             uint64_t(fapi2::current_err), mss::c_str(i_target));
+    return fapi2::current_err;
+}
+
+///
+/// @brief ATTR_MSS_VPD_DQ_MAP getter
+/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
+/// @param[out] uint8_t* memory to store the value
+/// @note Generated by gen_accessors.pl generateParameters (H)
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
+/// @note  [PORT][Dimm DQ PIN] The map from the Dual Inline Memory Module (DIMM) Data (DQ)
+/// Pin to the Module Package Data (DQ)
+/// Pinout
+///
+inline fapi2::ReturnCode vpd_dq_map(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
+{
+    if (o_array == nullptr)
+    {
+        FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
+        return fapi2::FAPI2_RC_INVALID_PARAMETER;
+    }
+
+    uint8_t l_value[2][72];
+
+    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_VPD_DQ_MAP, i_target, l_value) );
+    memcpy(o_array, &l_value, 144);
+    return fapi2::current_err;
+
+fapi_try_exit:
+    FAPI_ERR("failed accessing ATTR_MSS_VPD_DQ_MAP: 0x%lx (target: %s)",
+             uint64_t(fapi2::current_err), mss::c_str(i_target));
+    return fapi2::current_err;
+}
+
+
 }
 
 #endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_vpd_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_vpd_decoder.H
index a59560f7f..4ed05a8fe 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_vpd_decoder.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_vpd_decoder.H
@@ -1950,6 +1950,51 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+
+// VPD Keyword Version Byte: map
+///
+/// @brief ATTR_MSS_VPD_CKE_MAP decode and set
+/// @param[in] i_target fapi2::Target<fapi2::TARGET_TYPE_MCS>
+/// @param[in] i_blob the VPD blob for this MCS
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff set is OK
+/// @note  The Memory Clock Enable MAP is a bit map describing the Memory Clock Enable signal to its respective rank.
+/// There are 8 bits, but only 4 are currently used
+/// [DIMM0 CKE0][DIMM0 CKE1][N/A][N/A][DIMM1 CKE0][DIMM1 CKE1][N/A][N/A]
+/// E.g. 0x80 -> 0b10000000, which means DIMM0 CKE0 is mapped to that rank.
+///
+inline fapi2::ReturnCode vpd_cke_map(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, const uint8_t* i_blob)
+{
+    uint8_t l_value[2][2][4];
+
+    memcpy(&l_value, i_blob + 0, 16);
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_VPD_CKE_MAP, i_target, l_value),
+              "Unable to decode and set ATTR_MSS_VPD_CKE_MAP start: 0, len: 16");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
+
+// VPD Keyword Version Byte: map
+///
+/// @brief ATTR_MSS_VPD_DQ_MAP decode and set
+/// @param[in] i_target fapi2::Target<fapi2::TARGET_TYPE_MCS>
+/// @param[in] i_blob the VPD blob for this MCS
+/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff set is OK
+/// @note  [PORT][Dimm DQ PIN]  The map from the Dual Inline Memory Module (DIMM) Data (DQ) Pin to the Module Package Data (DQ) Pinout
+///
+inline fapi2::ReturnCode vpd_dq_map(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, const uint8_t* i_blob)
+{
+    uint8_t l_value[2][72];
+
+    memcpy(&l_value, i_blob + 0, 144);
+    FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_VPD_DQ_MAP, i_target, l_value),
+              "Unable to decode and set ATTR_MSS_VPD_DQ_MAP start: 0, len: 144");
+
+fapi_try_exit:
+    return fapi2::current_err;
+}
+
 }; // close decoder ns
 
 ///
@@ -1961,7 +2006,7 @@ fapi_try_exit:
 /// @note Decodes the blobs and sets all the attributes.
 ///
 inline fapi2::ReturnCode eff_decode(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
-                                    const std::vector<uint8_t*>& i_mt_blob, const uint8_t* i_mr_blob)
+                                    const std::vector<uint8_t*>& i_mt_blob, const uint8_t* i_mr_blob, const uint8_t* i_cke_blob, const uint8_t* i_dq_blob)
 {
     FAPI_TRY (decoder::vpd_mt_0_version_layout(i_target, i_mt_blob) );
     FAPI_TRY (decoder::vpd_mt_1_version_data(i_target, i_mt_blob) );
@@ -2043,6 +2088,8 @@ inline fapi2::ReturnCode eff_decode(const fapi2::Target<fapi2::TARGET_TYPE_MCS>&
     FAPI_TRY (decoder::vpd_mr_mc_2n_mode_autoset(i_target, i_mr_blob) );
     FAPI_TRY (decoder::vpd_mr_tsys_adr(i_target, i_mr_blob) );
     FAPI_TRY (decoder::vpd_mr_tsys_data(i_target, i_mr_blob) );
+    FAPI_TRY (decoder::vpd_cke_map(i_target, i_cke_blob) );
+    FAPI_TRY (decoder::vpd_dq_map(i_target, i_dq_blob) );
 
 fapi_try_exit:
     return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
index af655539d..bd76b42da 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
@@ -45,6 +45,7 @@ enum sizes
 {
     PORTS_PER_MCS = 2,
     PORTS_PER_MCBIST = 4,
+    MCS_PER_MC = 2,
     MC_PER_MODULE = 2,
     MCBIST_PER_MC = 1,
     MAX_DIMM_PER_PORT = 2,
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_vpd.C b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_vpd.C
index 598a2a01d..3c1c24732 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_vpd.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_vpd.C
@@ -34,6 +34,8 @@
 // *HWP Consumed by: HB:FSP
 
 #include <lib/utils/fake_vpd.H>
+#include <lib/shared/mss_const.H>
+#include <lib/utils/pos.H>
 
 #ifndef DOXYGEN
 
@@ -83,6 +85,101 @@ static constexpr uint8_t raw_mr[raw_mr_size] =
     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 };
 
+// The CKE blob has a header on it, and we want to return a pointer past that. Howevre, to
+// make creating this file easier we take the entire blob (header included)
+// Note:: ZZ (and hence Monza?) CKE mapping is the same for VBU - so only one mapping needed
+constexpr auto raw_cke_header = 4;
+constexpr auto raw_cke_size = 136;
+
+static constexpr uint8_t raw_cke[raw_cke_size] =
+{
+    0x01, 0x08, 0x10, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00, 0x08, 0x04, 0x00, 0x00, 0x80, 0x40, 0x00, 0x00,
+    0x08, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+constexpr auto raw_dq_size = 160;
+static constexpr uint8_t raw_dq[raw_dq_size] =
+{
+    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+    0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+    0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+    0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+    0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+    0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+    0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+    0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+    0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+// ZZ data Just In Case. Note ZZ maps DQ's different for each MCS (or has a map for each in
+// any event.) This also allows Louie to test sim (vbu VPD) and ! sim (ZZ VPD)
+static constexpr uint8_t zz_dq[MCS_PER_MC * MC_PER_MODULE][raw_dq_size] =
+{
+    // Port with relative position of 0
+    {
+        0x01, 0x00, 0x02, 0x03, 0x05, 0x04, 0x07, 0x06, 0x08, 0x09, 0x0a, 0x0b, 0x0d, 0x0c, 0x0f, 0x0e,
+        0x19, 0x18, 0x1a, 0x1b, 0x1d, 0x1c, 0x1f, 0x1e, 0x41, 0x42, 0x43, 0x40, 0x46, 0x47, 0x45, 0x44,
+        0x33, 0x32, 0x30, 0x31, 0x36, 0x37, 0x35, 0x34, 0x29, 0x28, 0x2a, 0x2b, 0x2d, 0x2c, 0x2e, 0x2f,
+        0x12, 0x13, 0x11, 0x10, 0x17, 0x16, 0x14, 0x15, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+        0x38, 0x39, 0x3b, 0x3a, 0x3c, 0x3d, 0x3f, 0x3e, 0x40, 0x42, 0x43, 0x41, 0x44, 0x47, 0x45, 0x46,
+        0x1a, 0x19, 0x1b, 0x18, 0x1e, 0x1c, 0x1d, 0x1f, 0x00, 0x03, 0x02, 0x01, 0x04, 0x06, 0x05, 0x07,
+        0x09, 0x08, 0x0b, 0x0a, 0x0c, 0x0f, 0x0d, 0x0e, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x31, 0x30, 0x32, 0x33, 0x35, 0x34, 0x36, 0x37,
+        0x2b, 0x2a, 0x28, 0x29, 0x2f, 0x2e, 0x2d, 0x2c, 0x12, 0x11, 0x13, 0x10, 0x14, 0x15, 0x16, 0x17,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    },
+
+    // Port with relative position of 1
+    {
+        0x11, 0x10, 0x12, 0x13, 0x15, 0x14, 0x16, 0x17, 0x0b, 0x0a, 0x08, 0x09, 0x0f, 0x0e, 0x0d, 0x0c,
+        0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x00, 0x01, 0x03, 0x02, 0x04, 0x05, 0x07, 0x06,
+        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+        0x00, 0x01, 0x03, 0x02, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d, 0x0f, 0x0e,
+        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+        0x28, 0x29, 0x2a, 0x2b, 0x2d, 0x2c, 0x2e, 0x2f, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    },
+
+    // Port with relative position of 2
+    {
+        0x19, 0x18, 0x1a, 0x1b, 0x1d, 0x1c, 0x1e, 0x1f, 0x12, 0x13, 0x10, 0x11, 0x16, 0x17, 0x14, 0x15,
+        0x02, 0x03, 0x00, 0x01, 0x06, 0x07, 0x04, 0x05, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+        0x41, 0x43, 0x40, 0x42, 0x47, 0x44, 0x45, 0x46, 0x3a, 0x38, 0x3b, 0x39, 0x3e, 0x3c, 0x3d, 0x3f,
+        0x29, 0x2a, 0x28, 0x2b, 0x2e, 0x2c, 0x2d, 0x2f, 0x20, 0x21, 0x22, 0x23, 0x25, 0x24, 0x26, 0x27,
+        0x32, 0x33, 0x30, 0x31, 0x36, 0x37, 0x34, 0x35, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+        0x12, 0x13, 0x10, 0x11, 0x16, 0x17, 0x15, 0x14, 0x18, 0x19, 0x1b, 0x1a, 0x1c, 0x1d, 0x1f, 0x1e,
+        0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d, 0x0f, 0x0e, 0x42, 0x43, 0x41, 0x40, 0x47, 0x46, 0x44, 0x45,
+        0x32, 0x33, 0x30, 0x31, 0x37, 0x36, 0x35, 0x34, 0x02, 0x03, 0x01, 0x00, 0x06, 0x07, 0x05, 0x04,
+        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x38, 0x3a, 0x3b, 0x39, 0x3e, 0x3c, 0x3f, 0x3d,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    },
+
+    // Port with relative position of 3
+    {
+        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f, 0x41, 0x42, 0x43, 0x40, 0x45, 0x44, 0x47, 0x46,
+        0x00, 0x02, 0x01, 0x03, 0x04, 0x06, 0x05, 0x07, 0x08, 0x09, 0x0b, 0x0a, 0x0c, 0x0d, 0x0e, 0x0f,
+        0x39, 0x38, 0x3a, 0x3b, 0x3c, 0x3d, 0x3f, 0x3e, 0x2a, 0x2b, 0x29, 0x28, 0x2f, 0x2e, 0x2d, 0x2c,
+        0x30, 0x31, 0x33, 0x32, 0x35, 0x34, 0x36, 0x37, 0x23, 0x22, 0x20, 0x21, 0x27, 0x24, 0x26, 0x25,
+        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x17, 0x16, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x19, 0x18, 0x1b, 0x1a, 0x1f, 0x1d, 0x1c, 0x1e, 0x23, 0x22, 0x21, 0x20, 0x24, 0x25, 0x26, 0x27,
+        0x08, 0x09, 0x0b, 0x0a, 0x0d, 0x0c, 0x0e, 0x0f, 0x12, 0x13, 0x11, 0x10, 0x17, 0x16, 0x14, 0x15,
+        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+        0x38, 0x39, 0x3a, 0x3b, 0x3d, 0x3c, 0x3e, 0x3f, 0x43, 0x42, 0x40, 0x41, 0x47, 0x46, 0x45, 0x44,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+    }
+};
+
 ///
 /// @brief Return a blob of memory VPD data associated with the input target
 /// @param[in] i_target     a valid fapi2 target
@@ -129,6 +226,34 @@ fapi2::ReturnCode getVPD(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
 
             break;
 
+        case fapi2::MemVpdData::CK:
+            io_vpd_info.iv_size = raw_cke_size - raw_cke_header;
+
+            if (o_blob != nullptr)
+            {
+                memcpy(o_blob, raw_cke + raw_cke_header, io_vpd_info.iv_size);
+            }
+
+            break;
+
+        case fapi2::MemVpdData::DQ:
+            {
+                io_vpd_info.iv_size = raw_dq_size;
+
+                if (o_blob != nullptr)
+                {
+                    uint8_t is_sim = 0;
+                    FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), is_sim) );
+
+                    // If we're in sim, we return the DQ map of the VBU (raw) DQ map - 1-1 more or less
+                    // Ifwe're not in sim, we return the DQ map which corresponds with our MCS relative
+                    // postion.
+                    const uint8_t* blob = is_sim ? raw_dq : zz_dq[mss::relative_pos<fapi2::TARGET_TYPE_PROC_CHIP>(i_target)];
+                    memcpy(o_blob, blob, io_vpd_info.iv_size);
+                }
+            }
+            break;
+
         case fapi2::MemVpdData::MP:
             FAPI_ERR("No MP?");
             return fapi2::FAPI2_RC_INVALID_PARAMETER;
@@ -141,6 +266,10 @@ fapi2::ReturnCode getVPD(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target,
     };
 
     return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+    return fapi2::current_err;
+
 }
 
 } // ns mss
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/pos.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/pos.H
index 3989e13b2..a3dc5328c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/pos.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/pos.H
@@ -173,12 +173,56 @@ fapi_try_exit:
 template< fapi2::TargetType R, fapi2::TargetType T, typename TT = posTraits<T> >
 inline typename TT::pos_type relative_pos(const fapi2::Target<T>& i_target);
 
+///
+/// @brief Return a MCA's relative position from an MCBIST
+/// @param[in] i_target a target representing the target in question
+/// @return The position relative to chiplet R
+///
 template<>
-inline uint8_t relative_pos<fapi2::TARGET_TYPE_MCBIST>(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target)
+inline posTraits<fapi2::TARGET_TYPE_MCA>::pos_type
+relative_pos<fapi2::TARGET_TYPE_MCBIST>(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target)
 {
     return pos(i_target) % PORTS_PER_MCBIST;
 }
 
+///
+/// @brief Return a DIMM's relative position from an MCS
+/// @param[in] i_target a target representing the target in question
+/// @return The position relative to chiplet R
+///
+template<>
+inline posTraits<fapi2::TARGET_TYPE_DIMM>::pos_type
+relative_pos<fapi2::TARGET_TYPE_MCS>(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target)
+{
+    constexpr uint64_t MAX_DIMM_PER_MCS = PORTS_PER_MCS * MAX_DIMM_PER_PORT;
+    return pos(i_target) % MAX_DIMM_PER_MCS;
+}
+
+///
+/// @brief Return an MCS's relative position from a processor
+/// @param[in] i_target a target representing the target in question
+/// @return The position relative to chiplet R
+///
+template<>
+inline posTraits<fapi2::TARGET_TYPE_MCS>::pos_type
+relative_pos<fapi2::TARGET_TYPE_PROC_CHIP>(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target)
+{
+    constexpr uint64_t MCS_PER_PROC = MC_PER_MODULE * MCS_PER_MC;
+    return pos(i_target) % MCS_PER_PROC;
+}
+
+///
+/// @brief Return an MCA's relative position from an MCS
+/// @param[in] i_target a target representing the target in question
+/// @return The position relative to chiplet R
+///
+template<>
+inline posTraits<fapi2::TARGET_TYPE_MCA>::pos_type
+relative_pos<fapi2::TARGET_TYPE_MCS>(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target)
+{
+    return pos(i_target) % PORTS_PER_MCS;
+}
+
 
 
 ///