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author | Michael Pardeik <pardeik@us.ibm.com> | 2018-06-19 12:54:15 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-06-21 17:22:18 -0400 |
commit | df43ad6f8512fa9d30a1a237dc0e9a51b355f6a4 (patch) | |
tree | 579e386a7e483b33cf778511ef831dd6cfc8390d /src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.C | |
parent | d420d7b06a2e9df94a849463369094db8e8f79ac (diff) | |
download | talos-hostboot-df43ad6f8512fa9d30a1a237dc0e9a51b355f6a4.tar.gz talos-hostboot-df43ad6f8512fa9d30a1a237dc0e9a51b355f6a4.zip |
P9N/P9C util to throttle HWP updates for min util and safemode
Changes include:
-- fix for SW408681 (p9n util to throttle min util enforcement)
-- safemode throttle calculation support when input util is 0 (p9n/p9c)
-- fix trace printing for floating point variables (p9n)
-- fix trace printing in equalize throttles (p9n)
Change-Id: I16530b98e29cb0ad32ae77387b92d9d70b50f83c
CQ: SW408681
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60895
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60898
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.C | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.C index 50a046c1c..bd5819fd2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_eff_config_thermal.C @@ -27,8 +27,8 @@ /// @file p9_mss_eff_config_thermal.C /// @brief Perform thermal calculations as part of the effective configuration /// -// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com> -// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Michael Pardeik <pardeik@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: FSP:HB @@ -72,6 +72,24 @@ extern "C" FAPI_INF("Size of vectors are %d %d %d", l_slope.size(), l_intercept.size(), l_thermal_power_limit.size()); + // Return error if safemode throttle utilization is less than MIN_UTIL + // This section needs to be in braces otherwise the compile will fail + { + uint16_t l_throttle_per_port = 0; + uint32_t l_throttle_denominator = 0; + FAPI_TRY(mss::mrw_mem_m_dram_clocks(l_throttle_denominator), "Error in p9_mss_eff_config_thermal" ); + FAPI_TRY(mss::mrw_safemode_mem_throttled_n_commands_per_port(l_throttle_per_port), + "Error in p9_mss_eff_config_thermal" ); + FAPI_ASSERT( (l_throttle_per_port >= (mss::power_thermal::MIN_UTIL * l_throttle_denominator / + mss::power_thermal::DRAM_BUS_UTILS / mss::power_thermal::UTIL_CONVERSION)), + fapi2::MSS_MRW_SAFEMODE_THROTTLE_NOT_SUPPORTED() + .set_MRW_SAFEMODE_N_VALUE(l_throttle_per_port) + .set_MRW_DRAM_CLOCK_THROTTLE_M(l_throttle_denominator) + .set_MIN_UTIL_VALUE(mss::power_thermal::MIN_UTIL), + "MRW safemode attribute (N=%d, M=%d) has less util than the min util allowed (%d centi percent)", + l_throttle_per_port, l_throttle_denominator, mss::power_thermal::MIN_UTIL); + } + //Restore runtime_throttles from safemode setting //Decode and set power curve attributes at the same time for (const auto& l_mcs : i_targets ) |