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author | Stephen Glancy <sglancy@us.ibm.com> | 2019-03-14 14:42:54 -0400 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-04-12 13:05:09 -0500 |
commit | f53d3ff4139f81f984861c1e6249d396960c42df (patch) | |
tree | cf3d1c100b4c60a1bbf92a1f920348f0335a5031 /src/import/chips/p9/procedures/hwp/memory/lib | |
parent | 27dd91ca09331e7fbeb37e033fbe0724e11a7545 (diff) | |
download | talos-hostboot-f53d3ff4139f81f984861c1e6249d396960c42df.tar.gz talos-hostboot-f53d3ff4139f81f984861c1e6249d396960c42df.zip |
Adds LRDIMM shadow register workaround
Change-Id: I8c0ad45871dc51d6e12c94c530e19b3d3a26ab7c
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73318
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73332
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C | 18 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H | 1 |
2 files changed, 19 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C index 89e4be5ee..316d7dc9b 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C @@ -38,6 +38,11 @@ #include <mss.H> #include <lib/ccs/ccs.H> #include <lib/fir/check.H> +#include <lib/phy/mss_lrdimm_training.H> + +#ifdef LRDIMM_CAPABLE + #include <lib/workarounds/quad_encode_workarounds.H> +#endif using fapi2::TARGET_TYPE_MCBIST; using fapi2::TARGET_TYPE_MCA; @@ -335,6 +340,19 @@ fapi2::ReturnCode execute( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, } } +#if LRDIMM_CAPABLE + + if(mss::workarounds::contains_command_mrs(i_program.iv_instructions)) + { + // Get ranks in pair bombs out if we can't get any ranks in this pair, so we should be safe here + for (const auto& p : i_ports) + { + FAPI_TRY(mss::workarounds::fix_shadow_register_corruption(p)); + } + } + +#endif + fapi_try_exit: i_program.iv_instructions.clear(); return fapi2::current_err; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index db61b8afb..bf84c1662 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -207,6 +207,7 @@ enum ffdc_function_codes // LR helper functions FINE_RECORDER_ADD_RESULTS = 119, FINE_RECORDER_FIND_EYE = 120, + FIX_SHADOW_REGISTER = 121, // LR training function DWL_CALL_OUT = 130, |