diff options
author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-03-10 16:12:51 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-23 15:30:49 -0400 |
commit | dfa1d6b0f32d17800569bc7ba152a1d25c4c1798 (patch) | |
tree | 7bb03e5319af1bb632e7953540d112c2351ac315 /src/import/chips/p9/procedures/hwp/memory/lib | |
parent | 08fd06fdc5c3e997ebc1e978cc3b42ad7082664c (diff) | |
download | talos-hostboot-dfa1d6b0f32d17800569bc7ba152a1d25c4c1798.tar.gz talos-hostboot-dfa1d6b0f32d17800569bc7ba152a1d25c4c1798.zip |
Fixing tfaw and trrd calculations
Change-Id: I690ae63d4fc8584bd1742a102698489f45fbdc0d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37925
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37936
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib')
5 files changed, 239 insertions, 367 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index f19b4ca8b..1c20e96b9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -185,6 +185,15 @@ enum invalid_freq_function_encoding BC0A = 0x0a, }; +/// +/// @brief encoding for MSS_INVALID_TIMING so we can look up functions based on encoding +/// +enum invalid_timing_function_encoding +{ + TRRD_S = 0, + TRRD_L = 1, + TFAW = 2, +}; ///////////////////////// // Non-member function implementations ///////////////////////// @@ -741,8 +750,8 @@ fapi2::ReturnCode eff_dimm::dram_trfc() // Calculate trfc (in ps) { constexpr int64_t l_trfc_ftb = 0; - FAPI_INF( "medium timebase (ps): %ld, fine timebase (ps): %ld, tRFC (MTB): %ld, tRFC(FTB): %ld", - iv_mtb, iv_ftb, l_trfc_mtb, l_trfc_ftb ); + FAPI_INF( "%s medium timebase (ps): %ld, fine timebase (ps): %ld, tRFC (MTB): %ld, tRFC(FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_trfc_mtb, l_trfc_ftb ); l_trfc_in_ps = spd::calc_timing_from_timebase(l_trfc_mtb, iv_mtb, l_trfc_ftb, iv_ftb); } @@ -945,8 +954,8 @@ fapi2::ReturnCode eff_dimm::dram_tccd_l() FAPI_TRY( iv_pDecoder->fine_offset_min_tccd_l(l_tccd_ftb), "Failed fine_offset_min_tccd_l() for %s", mss::c_str(iv_dimm) ); - FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tCCD_L (MTB): %ld, tCCD_L(FTB): %ld", - iv_mtb, iv_ftb, l_tccd_mtb, l_tccd_ftb ); + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, tCCD_L (MTB): %ld, tCCD_L(FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_tccd_mtb, l_tccd_ftb ); l_tccd_in_ps = spd::calc_timing_from_timebase(l_tccd_mtb, iv_mtb, l_tccd_ftb, iv_ftb); } @@ -1822,8 +1831,8 @@ fapi2::ReturnCode eff_dimm::dram_twr() FAPI_TRY( iv_pDecoder->min_write_recovery_time(l_twr_mtb), "Failed min_write_recovery_time() for %s", mss::c_str(iv_dimm) ); - FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tWR (MTB): %ld, tWR(FTB): %ld", - iv_mtb, iv_ftb, l_twr_mtb, l_twr_ftb); + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, tWR (MTB): %ld, tWR(FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_twr_mtb, l_twr_ftb); // Calculate twr (in ps) l_twr_in_ps = spd::calc_timing_from_timebase(l_twr_mtb, iv_mtb, l_twr_ftb, iv_ftb); @@ -1837,7 +1846,7 @@ fapi2::ReturnCode eff_dimm::dram_twr() FAPI_TRY( spd::calc_nck(l_twr_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_twr_in_nck), "Error in calculating l_twr_in_nck for target %s, with value of l_twr_in_ps: %d", mss::c_str(iv_dimm), l_twr_in_ps); - FAPI_INF( "tCK (ps): %d, tWR (ps): %d, tWR (nck): %d for target: %s", + FAPI_INF( "tCK (ps): %d, tWR (ps): %d, tWR (nck): %d for target: %s", iv_tCK_in_ps, l_twr_in_ps, l_twr_in_nck, mss::c_str(iv_dimm) ); // Get & update MCS attribute @@ -2841,8 +2850,8 @@ fapi2::ReturnCode eff_dimm::dram_trp() FAPI_TRY( iv_pDecoder->fine_offset_min_trp(l_trp_ftb), "Failed fine_offset_min_trp() for %s", mss::c_str(iv_dimm) ); - FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tRP (MTB): %ld, tRP(FTB): %ld", - iv_mtb, iv_ftb, l_trp_mtb, l_trp_ftb); + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, tRP (MTB): %ld, tRP(FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_trp_mtb, l_trp_ftb); l_trp_in_ps = spd::calc_timing_from_timebase(l_trp_mtb, iv_mtb, l_trp_ftb, iv_ftb); } @@ -2862,7 +2871,7 @@ fapi2::ReturnCode eff_dimm::dram_trp() FAPI_TRY( spd::calc_nck(l_trp_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_trp_in_nck), "Error in calculating dram_tRP nck for target %s, with value of l_trp_in_ps: %d", mss::c_str(iv_dimm), l_trp_in_ps); - FAPI_INF( "tCK (ps): %d, tRP (ps): %d, tRP (nck): %d for target: %s", + FAPI_INF( "tCK (ps): %d, tRP (ps): %d, tRP (nck): %d for target: %s", iv_tCK_in_ps, l_trp_in_ps, l_trp_in_nck, mss::c_str(iv_dimm) ); // Get & update MCS attribute @@ -2902,8 +2911,8 @@ fapi2::ReturnCode eff_dimm::dram_trcd() FAPI_TRY( iv_pDecoder->fine_offset_min_trcd(l_trcd_ftb), "Failed fine_offset_min_trcd() for %s", mss::c_str(iv_dimm) ); - FAPI_INF("medium timebase MTB (ps): %ld, fine timebase FTB (ps): %ld, tRCD (MTB): %ld, tRCD (FTB): %ld", - iv_mtb, iv_ftb, l_trcd_mtb, l_trcd_ftb); + FAPI_INF("%s medium timebase MTB (ps): %ld, fine timebase FTB (ps): %ld, tRCD (MTB): %ld, tRCD (FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_trcd_mtb, l_trcd_ftb); l_trcd_in_ps = spd::calc_timing_from_timebase(l_trcd_mtb, iv_mtb, l_trcd_ftb, iv_ftb); } @@ -2916,7 +2925,7 @@ fapi2::ReturnCode eff_dimm::dram_trcd() FAPI_TRY( spd::calc_nck(l_trcd_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_trcd_in_nck), "Error in calculating trcd for target %s, with value of l_trcd_in_ps: %d", mss::c_str(iv_dimm), l_trcd_in_ps); - FAPI_INF("tCK (ps): %d, tRCD (ps): %d, tRCD (nck): %d for target: %s", + FAPI_INF("tCK (ps): %d, tRCD (ps): %d, tRCD (nck): %d for target: %s", iv_tCK_in_ps, l_trcd_in_ps, l_trcd_in_nck, mss::c_str(iv_dimm)); // Get & update MCS attribute @@ -2951,8 +2960,8 @@ fapi2::ReturnCode eff_dimm::dram_trc() FAPI_TRY( iv_pDecoder->fine_offset_min_trc(l_trc_ftb), "Failed fine_offset_min_trc() for %s", mss::c_str(iv_dimm) ); - FAPI_INF("medium timebase MTB (ps): %ld, fine timebase FTB (ps): %ld, tRCmin (MTB): %ld, tRCmin(FTB): %ld", - iv_mtb, iv_ftb, l_trc_mtb, l_trc_ftb); + FAPI_INF("%s medium timebase MTB (ps): %ld, fine timebase FTB (ps): %ld, tRCmin (MTB): %ld, tRCmin(FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_trc_mtb, l_trc_ftb); l_trc_in_ps = spd::calc_timing_from_timebase(l_trc_mtb, iv_mtb, l_trc_ftb, iv_ftb); } @@ -2966,7 +2975,7 @@ fapi2::ReturnCode eff_dimm::dram_trc() "Error in calculating trc for target %s, with value of l_trc_in_ps: %d", mss::c_str(iv_dimm), l_trc_in_ps ); - FAPI_INF( "tCK (ps): %d, tRC (ps): %d, tRC (nck): %d for target: %s", + FAPI_INF( "tCK (ps): %d, tRC (ps): %d, tRC (nck): %d for target: %s", iv_tCK_in_ps, l_trc_in_ps, l_trc_in_nck, mss::c_str(iv_dimm) ); // Get & update MCS attribute @@ -2998,8 +3007,8 @@ fapi2::ReturnCode eff_dimm::dram_twtr_l() FAPI_TRY( iv_pDecoder->min_twtr_l(l_twtr_l_mtb) ); - FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tWTR_S (MTB): %ld, tWTR_S (FTB): %ld", - iv_mtb, iv_ftb, l_twtr_l_mtb, l_twtr_l_ftb ); + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, tWTR_S (MTB): %ld, tWTR_S (FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_twtr_l_mtb, l_twtr_l_ftb ); l_twtr_l_in_ps = spd::calc_timing_from_timebase(l_twtr_l_mtb, iv_mtb, l_twtr_l_ftb, iv_ftb); } @@ -3013,7 +3022,7 @@ fapi2::ReturnCode eff_dimm::dram_twtr_l() FAPI_TRY( spd::calc_nck(l_twtr_l_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_twtr_l_in_nck), "Error in calculating tWTR_L for target %s, with value of l_twtr_in_ps: %d", mss::c_str(iv_dimm), l_twtr_l_in_ps ); - FAPI_INF( "tCK (ps): %d, tWTR_L (ps): %d, tWTR_L (nck): %d for target: %s", + FAPI_INF( "tCK (ps): %d, tWTR_L (ps): %d, tWTR_L (nck): %d for target: %s", iv_tCK_in_ps, l_twtr_l_in_ps, l_twtr_l_in_nck, mss::c_str(iv_dimm) ); // Get & update MCS attribute @@ -3045,8 +3054,8 @@ fapi2::ReturnCode eff_dimm::dram_twtr_s() FAPI_TRY( iv_pDecoder->min_twtr_s(l_twtr_s_mtb) ); - FAPI_INF("medium timebase (ps): %ld, fine timebase (ps): %ld, tWTR_S (MTB): %ld, tWTR_S (FTB): %ld", - iv_mtb, iv_ftb, l_twtr_s_mtb, l_twtr_s_ftb ); + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, tWTR_S (MTB): %ld, tWTR_S (FTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_twtr_s_mtb, l_twtr_s_ftb ); l_twtr_s_in_ps = spd::calc_timing_from_timebase(l_twtr_s_mtb, iv_mtb, l_twtr_s_ftb, iv_ftb); } @@ -3059,7 +3068,7 @@ fapi2::ReturnCode eff_dimm::dram_twtr_s() FAPI_TRY( spd::calc_nck(l_twtr_s_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_twtr_s_in_nck), "Error in calculating tWTR_S for target %s, with value of l_twtr_in_ps: %d", mss::c_str(iv_dimm), l_twtr_s_in_ps); - FAPI_INF("tCK (ps): %d, tWTR_S (ps): %d, tWTR_S (nck): %d for target: %s", + FAPI_INF("tCK (ps): %d, tWTR_S (ps): %d, tWTR_S (nck): %d for target: %s", iv_tCK_in_ps, l_twtr_s_in_ps, l_twtr_s_in_nck, mss::c_str(iv_dimm) ); // Get & update MCS attribute @@ -3084,30 +3093,62 @@ fapi2::ReturnCode eff_dimm::dram_trrd_s() { std::vector<uint8_t> l_attrs_dram_trrd_s(PORTS_PER_MCS, 0); uint64_t l_trrd_s_in_nck = 0; - uint8_t l_stack_type = 0; + int64_t l_trrd_s_in_ps = 0; + uint64_t l_jedec_trrd = 0; uint8_t l_dram_width = 0; - FAPI_TRY( iv_pDecoder->prim_sdram_signal_loading(l_stack_type) ); - FAPI_TRY( iv_pDecoder->device_width(l_dram_width), - "Failed to access device_width()"); + // Calculate tRRD_S + { + int64_t l_trrd_s_mtb = 0; + int64_t l_trrd_s_ftb = 0; - // From the SPD Spec: - // At some frequencies, a minimum number of clocks may be required resulting - // in a larger tRRD_Smin value than indicated in the SPD. - // tRRD_S (3DS) is speed bin independent. - // So we won't read this from SPD and choose the correct value based on mss_freq + FAPI_TRY( iv_pDecoder->min_trrd_s(l_trrd_s_mtb), + "Failed min_trrd_s() for %s", mss::c_str(iv_dimm) ); - if( l_stack_type == fapi2::ENUM_ATTR_EFF_PRIM_STACK_TYPE_3DS) - { - FAPI_TRY( trrd_s_slr(iv_dimm, l_trrd_s_in_nck) ); + FAPI_TRY( iv_pDecoder->fine_offset_min_trrd_s(l_trrd_s_ftb), + "Failed fine_offset_min_trrd_s() for %s", mss::c_str(iv_dimm) ); + + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, trrd_s (MTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_trrd_s_mtb); + + l_trrd_s_in_ps = spd::calc_timing_from_timebase(l_trrd_s_mtb, iv_mtb, l_trrd_s_ftb, iv_ftb); + + FAPI_ASSERT( l_trrd_s_in_ps >= 0, + fapi2::MSS_INVALID_TIMING_VALUE() + .set_VALUE(l_trrd_s_in_ps) + .set_DIMM_TARGET(iv_dimm) + .set_FUNCTION(TRRD_S), + "%s Error calculating tRRD_S (%d). Less than or equal to 0", + mss::c_str(iv_dimm), + l_trrd_s_in_ps); + + FAPI_DBG("TRRD_S in ps is %d", l_trrd_s_in_ps); + + FAPI_TRY( spd::calc_nck(l_trrd_s_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_trrd_s_in_nck), + "Error in calculating l_tFAW for target %s, with value of l_trrd_s_in_ps: %d", + mss::c_str(iv_dimm), + l_trrd_s_in_nck); } - else + + FAPI_TRY( iv_pDecoder->device_width(l_dram_width), + "Failed device_width()"); + + FAPI_TRY( trrd_s( iv_dimm, l_dram_width, l_jedec_trrd) ); + + // Taking the worst case between the required minimum JEDEC value and the proposed value from SPD + if (l_jedec_trrd != l_trrd_s_in_nck) { - // Non-3DS - FAPI_TRY( mss::trrd_s(iv_dimm, l_dram_width, l_trrd_s_in_nck) ); + FAPI_INF("%s TRRD_S from JEDEC (%d) and from SPD (%d) don't match. Choosing worst case. dram width %d, freq %d", + mss::c_str(iv_dimm), + l_jedec_trrd, + l_trrd_s_in_nck, + l_dram_width, + iv_freq); + + l_trrd_s_in_nck = std::max( l_jedec_trrd, l_trrd_s_in_nck); } - FAPI_INF("SDRAM width: %d, tRRD_S (nck): %d for target: %s", + FAPI_INF("SDRAM width: %d, tFAW (nck): %d for target: %s", l_dram_width, l_trrd_s_in_nck, mss::c_str(iv_dimm)); // Get & update MCS attribute @@ -3132,36 +3173,69 @@ fapi2::ReturnCode eff_dimm::dram_trrd_l() { std::vector<uint8_t> l_attrs_dram_trrd_l(PORTS_PER_MCS, 0); uint64_t l_trrd_l_in_nck = 0; - uint8_t l_stack_type = 0; + int64_t l_trrd_l_in_ps = 0; uint8_t l_dram_width = 0; + uint64_t l_jedec_trrd = 0; + // Calculate tRRD_L + { + int64_t l_trrd_l_mtb = 0; + int64_t l_trrd_l_ftb = 0; - FAPI_TRY( iv_pDecoder->prim_sdram_signal_loading(l_stack_type), - "Failed prim_sdram_signal_loading()" ); - FAPI_TRY( iv_pDecoder->device_width(l_dram_width), - "Failed to access device_width()"); + FAPI_TRY( iv_pDecoder->min_trrd_l(l_trrd_l_mtb), + "Failed min_trrd_l() for %s", mss::c_str(iv_dimm) ); - // From the SPD Spec: - // At some frequencies, a minimum number of clocks may be required resulting - // in a larger tRRD_Lmin value than indicated in the SPD. - // tRRD_L (3DS) is speed bin independent. - // So we won't read this from SPD and choose the correct value based on mss_freq + FAPI_TRY( iv_pDecoder->fine_offset_min_trrd_l(l_trrd_l_ftb), + "Failed fine_offset_min_trrd_l() for %s", mss::c_str(iv_dimm) ); - if( l_stack_type == fapi2::ENUM_ATTR_EFF_PRIM_STACK_TYPE_3DS) - { - FAPI_TRY( trrd_l_slr(iv_dimm, l_trrd_l_in_nck) ); + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, trrd_l (MTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_trrd_l_mtb); + + l_trrd_l_in_ps = spd::calc_timing_from_timebase(l_trrd_l_mtb, iv_mtb, l_trrd_l_ftb, iv_ftb); + + FAPI_ASSERT( l_trrd_l_in_ps >= 0, + fapi2::MSS_INVALID_TIMING_VALUE() + .set_VALUE(l_trrd_l_in_ps) + .set_DIMM_TARGET(iv_dimm) + .set_FUNCTION(TRRD_L), + "%s Error calculating tRRD_L (%d). Less than or equal to 0", + mss::c_str(iv_dimm), + l_trrd_l_in_ps); + + + FAPI_DBG("TRRD_L in ps is %d", l_trrd_l_in_ps); + + FAPI_TRY( spd::calc_nck(l_trrd_l_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_trrd_l_in_nck), + "Error in calculating l_tFAW for target %s, with value of l_trrd_l_in_ps: %d", + mss::c_str(iv_dimm), + l_trrd_l_in_nck); } - else + + FAPI_TRY( iv_pDecoder->device_width(l_dram_width), + "Failed device_width()"); + + FAPI_TRY( trrd_l( iv_dimm, l_dram_width, l_jedec_trrd) ); + + // Taking the worst case between the required minimum JEDEC value and the proposed value from SPD + if (l_jedec_trrd != l_trrd_l_in_nck) { - FAPI_TRY( mss::trrd_l(iv_dimm, l_dram_width, l_trrd_l_in_nck), "Failed trrd_l()" ); + FAPI_INF("%s TRRD_L from JEDEC (%d) and from SPD (%d) don't match. Choosing worst case. dram width %d, freq %d", + mss::c_str(iv_dimm), + l_jedec_trrd, + l_trrd_l_in_nck, + l_dram_width, + iv_freq); + + l_trrd_l_in_nck = std::max( l_jedec_trrd, l_trrd_l_in_nck); } - FAPI_INF("SDRAM width: %d, tRRD_L (nck): %d for target: %s", + FAPI_INF("SDRAM width: %d, tFAW (nck): %d for target: %s", l_dram_width, l_trrd_l_in_nck, mss::c_str(iv_dimm)); // Get & update MCS attribute FAPI_TRY( eff_dram_trrd_l(iv_mcs, l_attrs_dram_trrd_l.data()) ); l_attrs_dram_trrd_l[iv_port_index] = l_trrd_l_in_nck; + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRRD_L, iv_mcs, UINT8_VECTOR_TO_1D_ARRAY(l_attrs_dram_trrd_l, PORTS_PER_MCS)), @@ -3181,7 +3255,7 @@ fapi2::ReturnCode eff_dimm::dram_trrd_dlr() std::vector<uint8_t> l_attrs_dram_trrd_dlr(PORTS_PER_MCS, 0); constexpr uint64_t l_trrd_dlr_in_nck = trrd_dlr(); - FAPI_INF("tRRD_dlr (nck): %d for target: %s", l_trrd_dlr_in_nck, mss::c_str(iv_dimm)); + FAPI_INF("tRRD_dlr (nck): %d for target: %s", l_trrd_dlr_in_nck, mss::c_str(iv_dimm)); // Get & update MCS attribute FAPI_TRY( eff_dram_trrd_dlr(iv_mcs, l_attrs_dram_trrd_dlr.data()) ); @@ -3205,24 +3279,59 @@ fapi2::ReturnCode eff_dimm::dram_tfaw() { std::vector<uint8_t> l_attrs_dram_tfaw(PORTS_PER_MCS, 0); uint64_t l_tfaw_in_nck = 0; - uint8_t l_stack_type = 0; + uint64_t l_jedec_tfaw_in_nck = 0; + int64_t l_tfaw_in_ps = 0; uint8_t l_dram_width = 0; + int64_t l_tfaw_ftb = 0; + + // Calculate tFAW + { + int64_t l_tfaw_mtb = 0; + + FAPI_TRY( iv_pDecoder->min_tfaw(l_tfaw_mtb), + "Failed min_tfaw() for %s", mss::c_str(iv_dimm) ); + + FAPI_INF("%s medium timebase (ps): %ld, fine timebase (ps): %ld, tfaw (MTB): %ld", + mss::c_str(iv_dimm), iv_mtb, iv_ftb, l_tfaw_mtb); + + l_tfaw_in_ps = spd::calc_timing_from_timebase(l_tfaw_mtb, iv_mtb, l_tfaw_ftb, iv_ftb); + + FAPI_ASSERT( l_tfaw_in_ps >= 0, + fapi2::MSS_INVALID_TIMING_VALUE() + .set_VALUE(l_tfaw_in_ps) + .set_DIMM_TARGET(iv_dimm) + .set_FUNCTION(TFAW), + "%s Error calculating tFAW (%d). Less than or equal to 0", + mss::c_str(iv_dimm), + l_tfaw_in_ps); + + FAPI_DBG("%s TFAW in ps is %d", mss::c_str(iv_dimm), l_tfaw_in_ps); + + FAPI_TRY( spd::calc_nck(l_tfaw_in_ps, iv_tCK_in_ps, INVERSE_DDR4_CORRECTION_FACTOR, l_tfaw_in_nck), + "Error in calculating l_tFAW for target %s, with value of l_tfaw_in_ps: %d", + mss::c_str(iv_dimm), + l_tfaw_in_nck); + } - FAPI_TRY( iv_pDecoder->prim_sdram_signal_loading(l_stack_type), - "Failed prim_sdram_signal_loading()"); FAPI_TRY( iv_pDecoder->device_width(l_dram_width), "Failed device_width()"); - if( l_stack_type == fapi2::ENUM_ATTR_EFF_PRIM_STACK_TYPE_3DS) - { - FAPI_TRY( tfaw_slr(iv_dimm, l_dram_width, l_tfaw_in_nck), "Failed tfaw_slr()"); - } - else + FAPI_TRY( mss::tfaw(iv_dimm, l_dram_width, l_jedec_tfaw_in_nck), "Failed tfaw()" ); + + // Taking the worst case between the required minimum JEDEC value and the proposed value from SPD + if (l_jedec_tfaw_in_nck != l_tfaw_in_nck) { - FAPI_TRY( mss::tfaw(iv_dimm, l_dram_width, l_tfaw_in_nck), "Failed tfaw()" ); + FAPI_INF("%s TFAW from JEDEC (%d) and from SPD (%d) don't match. Choosing worst case. dram width %d, freq %d", + mss::c_str(iv_dimm), + l_jedec_tfaw_in_nck, + l_tfaw_in_nck, + l_dram_width, + iv_freq); + + l_tfaw_in_nck = std::max(l_jedec_tfaw_in_nck, l_tfaw_in_nck); } - FAPI_INF("SDRAM width: %d, tFAW (nck): %d for target: %s", + FAPI_INF("SDRAM width: %d, tFAW (nck): %d for target: %s", l_dram_width, l_tfaw_in_nck, mss::c_str(iv_dimm)); // Get & update MCS attribute @@ -3249,7 +3358,7 @@ fapi2::ReturnCode eff_dimm::dram_tfaw_dlr() std::vector<uint8_t> l_attrs_dram_tfaw_dlr(PORTS_PER_MCS, 0); constexpr uint64_t l_tfaw_dlr_in_nck = tfaw_dlr(); - FAPI_INF("tFAW_dlr (nck): %d for target: %s", l_tfaw_dlr_in_nck, mss::c_str(iv_dimm)); + FAPI_INF("tFAW_dlr (nck): %d for target: %s", l_tfaw_dlr_in_nck, mss::c_str(iv_dimm)); // Get & update MCS attribute FAPI_TRY( eff_dram_tfaw_dlr(iv_mcs, l_attrs_dram_tfaw_dlr.data()) ); @@ -3293,7 +3402,7 @@ fapi2::ReturnCode eff_dimm::dram_tras() "Error in calculating tras_l for target %s, with value of l_twtr_in_ps: %d", mss::c_str(iv_dimm), l_tras_in_ps); - FAPI_INF("tCK (ps): %d, tRAS (ps): %d, tRAS (nck): %d for target: %s", + FAPI_INF("tCK (ps): %d, tRAS (ps): %d, tRAS (nck): %d for target: %s", iv_tCK_in_ps, l_tras_in_ps, l_tras_in_nck, mss::c_str(iv_dimm)); // Get & update MCS attribute diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H index c4ccad4c4..b652e7393 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H @@ -829,164 +829,6 @@ fapi_try_exit: } /// -/// @brief Helper function to find tFAW_slr_x4 based on speed (MT/s) -/// @tparam T the fapi2::TargetType of a type from which we can get MT/s -/// @param[in] i_target the fapi2 target -/// @param[out] o_output timing in clocks (nck) -/// @return FAPI2_RC_SUCCESS iff okay -/// @note this is only for 3DS DIMM -/// -template< fapi2::TargetType T > -static fapi2::ReturnCode tfaw_slr_x4_helper(const fapi2::Target<T>& i_target, - uint64_t& o_output) -{ - // Values derived from DDR4 Spec (79-4A) - // 13.3 Timing Parameters by Speed Grade - // Table 132. Pg 240 - fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; - - uint64_t l_freq = 0; - FAPI_TRY( freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_freq), - "Failed to invoke freq accessor" ); - - // It could have been more "efficient" to hand-calculate the answer and - // use compile time constants to return the answer. To avoid magic - // numbers and to align (more closely) with the DDR4 JEDEC spec, - // we let the std library do the work for us for maintainability. - // Could have used compile-time constants to denote the numbers below - // but they are "random" and vary. - switch(l_freq) - { - case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: - o_output = spd::ns_to_nck(i_target, 17); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: - o_output = spd::ns_to_nck(i_target, 15); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: - o_output = spd::ns_to_nck(i_target, 13); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_SPEED_FOR_TSV() - .set_FREQ(l_freq) - .set_TARGET(i_target), - "%s 2666 MT/s is TBD from the DDR4 3DS (TSV) spec", - mss::c_str(i_target)); - - break; - - default: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_FREQ_PASSED_IN() - .set_FREQ(l_freq) - .set_FUNCTION(TFAW_SLR_X4_HELPER) - .set_TARGET(i_target), - "%s Invalid frequency %lu", - mss::c_str(i_target), - l_freq); - break; - } - -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Helper function to find tFAW_slr_x8 based on speed (MT/s) -/// @tparam T the fapi2::TargetType of a type from which we can get MT/s -/// @param[in] i_target the fapi2 target -/// @param[out] o_output timing in clocks (nck) -/// @return FAPI2_RC_SUCCESS iff okay -/// @note this is only for 3DS DIMM -/// -template< fapi2::TargetType T > -static fapi2::ReturnCode tfaw_slr_x8_helper(const fapi2::Target<T>& i_target, - uint64_t& o_output) -{ - // Values derived from DDR4 Spec (79-4A) - // 13.3 Timing Parameters by Speed Grade - // Table 132. Pg 240 - fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; - - uint64_t l_freq = 0; - FAPI_TRY( freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_freq), - "Failed to invoke freq accessor" ); - FAPI_INF("Fetching timing value for %d MT/s"); - - // It could have been more "efficient" to hand-calculate the answer and - // use compile time constants to return the answer. To avoid magic - // numbers and to align (more closely) with the DDR4 JEDEC spec, - // we let the std library do the work for us for maintainability. - // Could have used compile-time constants to denote the numbers below - // but they are "random" and vary. - switch(l_freq) - { - case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: - o_output = spd::ns_to_nck(i_target, 23); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: - case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: - o_output = spd::ns_to_nck(i_target, 21); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_SPEED_FOR_TSV() - .set_FREQ(l_freq) - .set_TARGET(i_target), - "%s 2666 MT/s is TBD from the DDR4 3DS (TSV) spec", - mss::c_str(i_target)); - break; - - default: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_FREQ_PASSED_IN() - .set_FREQ(l_freq) - .set_FUNCTION(TFAW_SLR_X8_HELPER) - .set_TARGET(i_target), - "%s Invalid frequency %lu", - mss::c_str(i_target), - l_freq); - break; - } - - return fapi2::FAPI2_RC_SUCCESS; -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Return the minimum allowable tFAW in nck -/// @tparam T the fapi2::TargetType of a type from which we can get MT/s -/// @param[in] i_target the fapi2 target -/// @param[in] i_page_size the page size -/// @param[out] o_tFAW timing in clocks (nck) -/// @return FAPI2_RC_SUCCESS iff okay -// -template< fapi2::TargetType T > -fapi2::ReturnCode tfaw_slr( const fapi2::Target<T>& i_target, - const uint8_t i_dram_width, - uint64_t& o_tFAW ) -{ - if( i_dram_width == fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4 ) - { - FAPI_TRY( tfaw_slr_x4_helper(i_target, o_tFAW) ); - } - else - { - FAPI_TRY( tfaw_slr_x8_helper(i_target, o_tFAW) ); - } - -fapi_try_exit: - return fapi2::current_err; -} - -/// /// @brief tFAW_dlr *in nck* /// @return 16nck /// @note From DDR4 3DS Spec @@ -1009,141 +851,6 @@ constexpr uint64_t trrd_dlr() } /// -/// @brief Find tRRD_S_slr in nck -/// @tparam T the fapi2::TargetType of a type from which we can get MT/s -/// @param[in] i_target the fapi2 target -/// @param[out] o_output timing in clocks (nck) -/// @return FAPI2_RC_SUCCESS iff okay -/// @note this is only for 3DS DIMM -/// -template< fapi2::TargetType T > -fapi2::ReturnCode trrd_s_slr(const fapi2::Target<T>& i_target, - uint64_t& o_output) -{ - - // Values derived from DDR4 3DS Spec - // 13.3 Timing Parameters by Speed Grade - // Table 132. Pg 240 - fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; - - // It could have been more "efficient" to hand-calculate the answer and - // use compile time constants to return the answer. To avoid magic - // numbers and to align (more closely) with the DDR4 JEDEC spec, - // we let the std library do the work for us for maintainability. - // Could have used compile-time constants to denote the numbers below - // but they are "random" and vary. - uint64_t l_freq = 0; - FAPI_TRY( freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_freq), - "Failed to invoke freq accessor" ); - - switch(l_freq) - { - case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: - o_output = std::max( 4, spd::ps_to_nck(i_target, 4200) ); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: - o_output = std::max( 4, spd::ps_to_nck(i_target, 3700) ); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: - o_output = std::max( 4, spd::ps_to_nck(i_target, 3300) ); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_SPEED_FOR_TSV() - .set_FREQ(l_freq) - .set_TARGET(i_target), - "%s 2666 MT/s is TBD from the DDR4 3DS (TSV) spec", - mss::c_str(i_target)); - break; - - default: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_FREQ_PASSED_IN() - .set_FREQ(l_freq) - .set_FUNCTION(TRRD_S_SLR) - .set_TARGET(i_target), - "%s Invalid frequency %lu", - mss::c_str(i_target), - l_freq); - - - break; - } - - return fapi2::FAPI2_RC_SUCCESS; -fapi_try_exit: - return fapi2::current_err; -} - -/// -/// @brief Find tRRD_L_slr in nck -/// @tparam T the fapi2::TargetType of a type from which we can get MT/s -/// @param[in] i_target the fapi2 target -/// @param[out] o_output timing in clocks (nck) -/// @return FAPI2_RC_SUCCESS iff okay -/// @note this is only for 3DS DIMM -/// -template< fapi2::TargetType T > -fapi2::ReturnCode trrd_l_slr(const fapi2::Target<T>& i_target, - uint64_t& o_output) -{ - - // Values derived from DDR4 3DS Spec - // 13.3 Timing Parameters by Speed Grade - // Table 132. Pg 240 - fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; - - // It could have been more "efficient" to hand-calculate the answer and - // use compile time constants to return the answer. To avoid magic - // numbers and to align (more closely) with the DDR4 JEDEC spec, - // we let the std library do the work for us for maintainability. - // Could have used compile-time constants to denote the numbers below - // but they are "random" and vary. - uint64_t l_freq = 0; - FAPI_TRY( freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_freq), - "Failed to invoke freq accessor" ); - - switch(l_freq) - { - case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: - case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: - o_output = std::max( 4, spd::ps_to_nck(i_target, 5300) ); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: - o_output = std::max( 4, spd::ps_to_nck(i_target, 4900) ); - break; - - case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_SPEED_FOR_TSV() - .set_FREQ(l_freq) - .set_TARGET(i_target), - "%s 2666 MT/s is TBD from the DDR4 3DS (TSV) spec", - mss::c_str(i_target)); - break; - - default: - FAPI_ASSERT( false, - fapi2::MSS_INVALID_FREQ_PASSED_IN() - .set_FREQ(l_freq) - .set_FUNCTION(TRRD_L_SLR) - .set_TARGET(i_target), - "%s Invalid frequency %lu", - mss::c_str(i_target), - l_freq); - break; - } - - return fapi2::FAPI2_RC_SUCCESS; -fapi_try_exit: - return fapi2::current_err; -} - -/// /// @brief Helper function to find tRRD_L based speed (MT/s) for 1KB page /// @tparam T the fapi2::TargetType of a type from which we can get MT/s /// @param[in] i_target the fapi2 target @@ -1317,19 +1024,19 @@ static fapi2::ReturnCode trrd_s_half_and_1kb_page_helper(const fapi2::Target<T>& switch(l_freq) { case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: - o_output = std::max( 4, spd::ns_to_nck(i_target, 4200) ); + o_output = std::max( 4, spd::ps_to_nck(i_target, 4200) ); break; case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: - o_output = std::max( 4, spd::ns_to_nck(i_target, 3700) ); + o_output = std::max( 4, spd::ps_to_nck(i_target, 3700) ); break; case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: - o_output = std::max( 4, spd::ns_to_nck(i_target, 3300) ); + o_output = std::max( 4, spd::ps_to_nck(i_target, 3300) ); break; case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: - o_output = std::max( 4, spd::ns_to_nck(i_target, 3000) ); + o_output = std::max( 4, spd::ps_to_nck(i_target, 3000) ); break; default: diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C index 2aee44105..168625717 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/cas_latency.C @@ -57,6 +57,16 @@ using fapi2::TARGET_TYPE_MCA; namespace mss { +/// +/// @brief encoding for MSS_INVALID_TIMING so we can look up functions based on encoding +/// +enum invalid_timing_function_encoding +{ + TAAMIN = 10, + TCKMIN = 11, + TCKMAX = 12, +}; + ///////////////////////// // Member method implementation ///////////////////////// @@ -277,6 +287,7 @@ fapi2::ReturnCode cas_latency::get_taamin( const std::shared_ptr<mss::spd::decod FAPI_ASSERT(o_value > 0, fapi2::MSS_INVALID_TIMING_VALUE(). set_VALUE(o_value). + set_FUNCTION(TAAMIN). set_DIMM_TARGET(iv_target), "%s. tAAmin invalid (<= 0) : %d", mss::c_str(iv_target), @@ -325,6 +336,7 @@ fapi2::ReturnCode cas_latency::get_tckmin( const std::shared_ptr<mss::spd::decod FAPI_ASSERT(o_value > 0, fapi2::MSS_INVALID_TIMING_VALUE(). set_VALUE(o_value). + set_FUNCTION(TCKMIN). set_DIMM_TARGET(iv_target), "%s. tCKmin invalid (<= 0) : %d", mss::c_str(iv_target), @@ -372,6 +384,7 @@ fapi2::ReturnCode cas_latency::get_tckmax( const std::shared_ptr<mss::spd::decod FAPI_ASSERT(o_value > 0, fapi2::MSS_INVALID_TIMING_VALUE(). set_VALUE(o_value). + set_FUNCTION(TCKMAX). set_DIMM_TARGET(iv_target), "%s. tCKmax invalid (<= 0) : %d", mss::c_str(iv_target), diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C index 6d1316d6d..ad8baffff 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -195,6 +195,42 @@ constexpr uint8_t SAMSUNG_64GB_2S2RX4_2400_DDR4_RDIMM_3DS_SPD[] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; +constexpr uint8_t CUSTOM_16GB_2RX8_SPD[] = +{ + 0x23, 0x11, 0x0C, 0x01, 0x85, 0x21, 0x00, 0x08, 0x00, 0x60, 0x00, 0x03, 0x09, 0x0B, 0x80, 0x00, + 0x00, 0x00, 0x07, 0x0D, 0xF8, 0x0F, 0x00, 0x00, 0x6E, 0x6E, 0x6E, 0x11, 0x00, 0x6E, 0xF0, 0x0A, + 0x20, 0x08, 0x00, 0x05, 0x00, 0xA8, 0x1B, 0x28, 0x28, 0x00, 0x78, 0x00, 0x14, 0x3C, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0B, 0x2C, 0x0B, 0x2C, + 0x0B, 0x36, 0x2C, 0x36, 0x0B, 0x2C, 0x0C, 0x2C, 0x0C, 0x2C, 0x0C, 0x2C, 0x0C, 0x2C, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9C, 0xB5, 0x00, 0x00, 0x00, 0x00, 0xE7, 0xD6, 0x6A, 0x66, + 0x0A, 0x11, 0xFF, 0x15, 0x00, 0x80, 0xB3, 0xB1, 0xB2, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB7, 0x83, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0x98, 0x4B, 0x16, 0x17, 0x00, 0x00, 0x00, 0x00, 0x4B, 0x46, 0x32, 0x37, 0x30, 0x30, 0x30, + 0x30, 0x38, 0x38, 0x2D, 0x30, 0x30, 0x34, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x01, 0x80, 0xCE, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + /// /// @brief Return a blob of SPD data from a DIMM /// @param[in] i_target a DIMM target representing the DIMM in question @@ -235,6 +271,12 @@ fapi2::ReturnCode getSPD( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target return fapi2::FAPI2_RC_SUCCESS; break; + case spd_type::CUSTOM_16GB_2RX8: + FAPI_INF("Selected SPD for CUSTOM_16GB_2RX8"); + spd_helper(CUSTOM_16GB_2RX8_SPD, o_blob, o_size); + return fapi2::FAPI2_RC_SUCCESS; + break; + default: FAPI_ERR( "Recieved invalid SPD Type: %d", static_cast<uint8_t>(i_type) ); return fapi2::FAPI2_RC_INVALID_PARAMETER; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.H index fad24d055..151e0f5b4 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/fake_spd.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -48,7 +48,8 @@ enum class spd_type VBU_16GB_2RX4_2400_DDR4_RDIMM, MICRON_8GB_1Rx8_2400_DDR4_RDIMM, MICRON_32GB_2RX4_2400_DDR4_LRDIMM, - SAMSUNG_64GB_2S2RX4_2400_DDR4_RDIMM_3DS + SAMSUNG_64GB_2S2RX4_2400_DDR4_RDIMM_3DS, + CUSTOM_16GB_2RX8, }; /// |