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authorStephen Glancy <sglancy@us.ibm.com>2018-10-03 17:37:10 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-10-15 12:41:23 -0500
commit6ba203356a7cf73fe990ed00dc410981c0f59a79 (patch)
tree3a45760262fcf509c5f6e3422152d083ae5cf51e /src/import/chips/p9/procedures/hwp/memory/lib
parent4992f9d6d9b2f3f5096d27d2883f88c4a2b5f384 (diff)
downloadtalos-hostboot-6ba203356a7cf73fe990ed00dc410981c0f59a79.tar.gz
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Fixes VPD access and eff_config for LRDIMM's
Change-Id: I82c257122b953f55188b696c0c93ee76d0fed337 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67008 Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67019 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C24
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C18
2 files changed, 24 insertions, 18 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
index c6ac6db5a..ae55f78e0 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
@@ -48,6 +48,7 @@
#include <lib/shared/mss_kind.H>
#include <lib/phy/dp16.H>
#include <lib/mss_attribute_accessors_manual.H>
+#include <generic/memory/lib/utils/freq/gen_mss_freq.H>
namespace mss
{
@@ -4496,8 +4497,10 @@ fapi2::ReturnCode eff_lrdimm::dram_rtt_park()
FAPI_TRY( eff_dram_rtt_park(iv_mcs, &l_mcs_attrs[0][0][0]) );
// Get the value from the LRDIMM SPD
- FAPI_TRY( iv_spd_decoder.dram_rtt_park_ranks0_1(iv_freq, l_decoder_val_01) );
- FAPI_TRY( iv_spd_decoder.dram_rtt_park_ranks2_3(iv_freq, l_decoder_val_23) );
+ FAPI_TRY( iv_spd_decoder.dram_rtt_park_ranks0_1(iv_freq, l_decoder_val_01),
+ "%s failed to decode RTT_PARK for ranks 0/1", mss::c_str(iv_mcs) );
+ FAPI_TRY( iv_spd_decoder.dram_rtt_park_ranks2_3(iv_freq, l_decoder_val_23),
+ "%s failed to decode RTT_PARK for ranks 2/3", mss::c_str(iv_mcs) );
// Setting the four rank values for this dimm
// Rank 0 and 1 have the same value, l_decoder_val_01
@@ -5249,21 +5252,10 @@ fapi2::ReturnCode eff_dimm::decode_vpd(const fapi2::Target<TARGET_TYPE_MCS>& i_t
// Find our blob in the vector of blob pointers
uint8_t* l_mt_blob = l_mt_blobs[mss::index(p)];
- uint64_t l_rank_count_dimm[MAX_DIMM_PER_PORT] = {};
- // If we don't have any DIMM, don't worry about it. This will just drop the blob full of 0's into our index.
- // This will fill the VPD attributes with 0's which is perfectly ok.
- for (const auto& d : mss::find_targets<TARGET_TYPE_DIMM>(p))
- {
- uint8_t l_num_master_ranks = 0;
- FAPI_TRY( mss::eff_num_master_ranks_per_dimm(d, l_num_master_ranks) );
- l_rank_count_dimm[mss::index(d)] = l_num_master_ranks;
- }
-
- // This value will, of course, be 0 if there is no DIMM in the port.
- // Which shouldn't happen w/the DIMM check above.
- l_vpd_info.iv_rank_count_dimm_0 = l_rank_count_dimm[0];
- l_vpd_info.iv_rank_count_dimm_1 = l_rank_count_dimm[1];
+ // Sets up the number of ranks for this port
+ FAPI_TRY(configure_vpd_ranks<mss::proc_type::NIMBUS>(p, l_vpd_info), "%s failed to configure the ranks on the VPD",
+ mss::c_str(p));
FAPI_INF("%s. VPD info - rank count for dimm_0: %d, dimm_1: %d",
mss::c_str(i_target), l_vpd_info.iv_rank_count_dimm_0, l_vpd_info.iv_rank_count_dimm_1);
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C
index 688875f34..0a1f6b8b7 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C
@@ -131,8 +131,8 @@ fapi2::ReturnCode set_freq<mss::proc_type::NIMBUS>(
///
/// @brief Gets the number of master ranks per DIMM - specialization for NIMBUS and MCA
-/// @param[in] i_target the target on which to set the frequency values
-/// @param[out] o_master_ranks number of master ranks per DIMM
+/// @param[in] i_target the target on which to get the number of master ranks per DIMM
+/// @param[out] o_master_ranks number of master ranks per DIMM
/// @return FAPI2_RC_SUCCESS iff ok
///
template<>
@@ -155,6 +155,20 @@ fapi2::ReturnCode max_allowed_dimm_freq<mss::proc_type::NIMBUS>(uint32_t* o_allo
}
///
+/// @brief Gets the DIMM type - specialization for NIMBUS and MCA
+/// @param[in] i_target the target on which to get the DIMM types
+/// @param[out] o_dimm_type DIMM types
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode get_dimm_type<mss::proc_type::NIMBUS>(
+ const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+ uint8_t* o_dimm_type)
+{
+ return mss::eff_dimm_type(i_target, o_dimm_type);
+}
+
+///
/// @brief Update supported frequency scoreboard according to processor limits - specialization for NIMBUS and MCBIST
/// @param[in] i_target processor frequency domain
/// @param[in,out] io_scoreboard scoreboard of port targets supporting each frequency
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