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| author | Stephen Glancy <sglancy@us.ibm.com> | 2017-11-28 14:28:49 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-01-13 14:14:56 -0500 |
| commit | 6650adcec6acc4358ded7a9e2256d096123fde8b (patch) | |
| tree | 95f990074d815ef71eb2b4dc9211decc6051459f /src/import/chips/p9/procedures/hwp/memory/lib/workarounds | |
| parent | 21407ef5012141424473c7df5839dc4ab9ab662a (diff) | |
| download | talos-hostboot-6650adcec6acc4358ded7a9e2256d096123fde8b.tar.gz talos-hostboot-6650adcec6acc4358ded7a9e2256d096123fde8b.zip | |
Updates training advanced and adds custom WR CTR
Breaks apart and reorganizes training advanced code
Adds custom pattern WR CTR in training advanced
Updates custom WR/RD patterns for characterization data
Change-Id: I3fc6e515f0ae2f853ce53a198a82b7513da4eea5
CQ:SW411492
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50118
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50141
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/workarounds')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C index 123329307..1839d103c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2017 */ +/* Contributors Listed Below - COPYRIGHT 2017,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -81,7 +81,7 @@ fapi2::ReturnCode set_init_cal_refresh(const fapi2::Target<fapi2::TARGET_TYPE_MC mss::pc::set_snoop_dis(l_data, mss::LOW); mss::pc::set_refresh_interval(l_data, REF_INTERVAL); - FAPI_TRY( mss::pc::write_init_cal_config1(i_target, l_data) ) + FAPI_TRY( mss::pc::write_init_cal_config1(i_target, l_data) ); fapi_try_exit: return fapi2::current_err; @@ -102,7 +102,7 @@ fapi2::ReturnCode clear_init_cal_refresh(const fapi2::Target<fapi2::TARGET_TYPE_ mss::pc::set_refresh_control(l_data, REF_CNTL); - FAPI_TRY( mss::pc::write_init_cal_config1(i_target, l_data) ) + FAPI_TRY( mss::pc::write_init_cal_config1(i_target, l_data) ); fapi_try_exit: return fapi2::current_err; |
