From 6650adcec6acc4358ded7a9e2256d096123fde8b Mon Sep 17 00:00:00 2001 From: Stephen Glancy Date: Tue, 28 Nov 2017 14:28:49 -0600 Subject: Updates training advanced and adds custom WR CTR Breaks apart and reorganizes training advanced code Adds custom pattern WR CTR in training advanced Updates custom WR/RD patterns for characterization data Change-Id: I3fc6e515f0ae2f853ce53a198a82b7513da4eea5 CQ:SW411492 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50118 Tested-by: FSP CI Jenkins Dev-Ready: STEPHEN GLANCY Tested-by: Jenkins Server Tested-by: HWSV CI Tested-by: Hostboot CI Reviewed-by: Louis Stermole Reviewed-by: ANDRE A. MARIN Reviewed-by: Jennifer A. Stofer Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50141 Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Reviewed-by: Daniel M. Crowell --- .../procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/workarounds') diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C index 123329307..1839d103c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dqs_align_workarounds.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2017 */ +/* Contributors Listed Below - COPYRIGHT 2017,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -81,7 +81,7 @@ fapi2::ReturnCode set_init_cal_refresh(const fapi2::Target