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authorBrian Silver <bsilver@us.ibm.com>2016-11-08 15:43:06 -0600
committerChristian R. Geddes <crgeddes@us.ibm.com>2016-11-11 09:37:25 -0500
commite7f3ba824a75c7708e3da353557090bd923a0e63 (patch)
tree2d0065b1c58e6349816f296d7ed651c8e74ee826 /src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H
parent2afa9f5dcd3d638c8f47c0a2eedaae2cb92d78be (diff)
downloadtalos-hostboot-e7f3ba824a75c7708e3da353557090bd923a0e63.tar.gz
talos-hostboot-e7f3ba824a75c7708e3da353557090bd923a0e63.zip
Add EC feature levels to MSS workarounds
Change-Id: Iec6db88808f26353ce88f9038222db12f2d9b6c0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32421 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32427 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H34
1 files changed, 26 insertions, 8 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H
index 171eb46e2..366bdded7 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H
@@ -84,15 +84,22 @@ fapi2::ReturnCode dqsclk_offset( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_
///
/// @brief DP16 DLL_VREG_CONTROL0
/// In DD1.0 Nimbus VREG control work arounds are needed
+/// @param[in] port in question - needed to figure out whether to apply the work-around or not
/// @param[in] i_original_value a value to which we add the workaround bits
/// @return uint64_t the original value with the bits added
///
-inline uint64_t vreg_control0( const uint64_t i_original_value )
+inline uint64_t vreg_control0( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+ const uint64_t i_original_value )
{
- // TK: Figure out how we know what part doesn't need this workaround.
fapi2::buffer<uint64_t> l_value(i_original_value);
uint8_t l_vccd_override = 0;
+ // Check for whether we apply this workaround or not
+ if (! mss::chip_ec_feature_mss_vccd_override(i_target) )
+ {
+ return i_original_value;
+ }
+
FAPI_TRY( mss::vccd_override(l_vccd_override) );
// No VCCD override, don't mess with the DLL's
@@ -118,16 +125,21 @@ fapi_try_exit:
///
/// @brief DP16 VREF DAC override
/// In DD1.0 Nimbus VREF DAC work arounds are needed
+/// @param[in] i_target the port target for this override
/// @param[in] i_original_value a value to which we add the workaround bits
/// @return uint64_t the original value with the bits added
///
-inline uint64_t vref_dac( const uint64_t i_original_value )
+inline uint64_t vref_dac( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, const uint64_t i_original_value )
{
- // TK: Figure out how we know what part doesn't need this workaround.
fapi2::buffer<uint64_t> l_value(i_original_value);
- // We have an attribute for VREF DAC nibble, if it's 0 then we'll
- // not do anything
+ // Check for whether we apply this workaround or not
+ if (! mss::chip_ec_feature_mss_vref_dac(i_target) )
+ {
+ return i_original_value;
+ }
+
+ // We have an attribute for VREF DAC nibble, if it's 0 then we'll not do anything
uint8_t l_vref_dac_nibble = 0;
FAPI_TRY( mss::vref_dac_nibble(l_vref_dac_nibble) );
@@ -159,15 +171,21 @@ fapi_try_exit:
///
/// @brief DP16 VREG Coarse override
/// In DD1.0 Nimbus VREG Coarse work arounds are needed
+/// @param[in] i_target the port target for this override
/// @param[in] i_original_value a value to which we add the workaround bits
/// @return uint64_t the original value with the bits added
///
-inline uint64_t vreg_coarse( const uint64_t i_original_value )
+inline uint64_t vreg_coarse( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, const uint64_t i_original_value )
{
- // TK: Figure out how we know what part doesn't need this workaround.
fapi2::buffer<uint64_t> l_value(i_original_value);
uint8_t l_vccd_override = 0;
+ // Check for whether we apply this workaround or not
+ if (! mss::chip_ec_feature_mss_vreg_coarse(i_target) )
+ {
+ return i_original_value;
+ }
+
FAPI_TRY( mss::vccd_override(l_vccd_override) );
if (fapi2::ENUM_ATTR_MSS_VCCD_OVERRIDE_YES == l_vccd_override)
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