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| author | Stephen Glancy <sglancy@us.ibm.com> | 2017-02-21 13:05:39 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-03-01 13:20:52 -0500 |
| commit | aba5dad89d16464fbf1a9228f5c44c5972e9d070 (patch) | |
| tree | 65295a0c902e441aa08d2e6b919e0446c5fb922f /src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H | |
| parent | 98d40a971e051f00688086a2b1b990ab4dab31af (diff) | |
| download | talos-hostboot-aba5dad89d16464fbf1a9228f5c44c5972e9d070.tar.gz talos-hostboot-aba5dad89d16464fbf1a9228f5c44c5972e9d070.zip | |
Updates to run HW VREF cal by default
This code runs the HW VREF calibrations (both WR and RD VREF)
by default if it is supported by the HW. Four new attributes are
added to handle whether HW VREF cal should be run and with what overrides
it needs to be run.
Change-Id: I3ed63794e955ee8c94cffce0b98dba58886e4a9d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36803
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: RYAN P. KING <rpking@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36807
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H index 25e6efc97..03ecb9b2e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.H @@ -252,6 +252,33 @@ fapi2::ReturnCode fix_blue_waterfall_gate( const fapi2::Target<fapi2::TARGET_TYP /// fapi2::ReturnCode modify_calibration_results( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ); +/// +/// @brief Cleans up the VREF sense values after training +/// @param[in] i_target the fapi2 target of the port +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// @note This function is called after training - it will only be run after coarse wr/rd +/// +fapi2::ReturnCode rd_vref_vref_sense_cleanup( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ); + +/// +/// @brief Sets up the VREF sense values before training +/// @param[in] i_target the fapi2 target of the port +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// @note This function is called before training +/// +fapi2::ReturnCode rd_vref_vref_sense_setup( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ); + + +/// +/// @brief Workarounds for after training +/// @param[in] i_target the fapi2 target of the port +/// @param[in] i_cal_steps_enabled the enabled cal steps +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// @note This function is called after training - it will only be run after coarse wr/rd +/// +fapi2::ReturnCode post_training_workarounds( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const fapi2::buffer<uint16_t>& i_cal_steps_enabled ); + namespace wr_vref { |
