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authorJacob Harvey <jlharvey@us.ibm.com>2016-09-21 18:06:06 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2016-09-29 10:06:23 -0400
commitfa4aedab816820cefc1f7c8158aed73ca69def79 (patch)
tree078a76a11d8b49698717372b0f2d53865e32ad85 /src/import/chips/p9/procedures/hwp/memory/lib/spd
parent64a24f1134da389173e26ea21d16931012dd573c (diff)
downloadtalos-hostboot-fa4aedab816820cefc1f7c8158aed73ca69def79.tar.gz
talos-hostboot-fa4aedab816820cefc1f7c8158aed73ca69def79.zip
Cleaned spd xml and Added module manufacturer info
Change-Id: I9a232b4305d280025ab8540910a90bb89a62e07e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30071 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30111 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/spd')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/common/dimm_module_decoder.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C262
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H109
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_0.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C4
7 files changed, 376 insertions, 15 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/dimm_module_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/dimm_module_decoder.H
index b737d196b..e8b5716e2 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/dimm_module_decoder.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/dimm_module_decoder.H
@@ -196,13 +196,13 @@ class dimm_module_decoder
}
///
- /// @brief Decodes manufacturer ID code
+ /// @brief Decodes register manufacturer ID code
/// @param[out] o_output drive strength encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
/// @note SPD Byte 134 (Bits 7~0)
/// @note Item JEDEC Standard No. 21-C
///
- virtual fapi2::ReturnCode manufacturer_id_code(uint8_t& o_output)
+ virtual fapi2::ReturnCode reg_manufacturer_id_code(uint8_t& o_output)
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C
index fcb0f38e1..869ab0832 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.C
@@ -2815,8 +2815,270 @@ fapi2::ReturnCode decoder::cyclical_redundancy_code(const fapi2::Target<fapi2::T
}
///
+/// @brief Decodes module manufacturer ID code
+/// @param[in] i_target TARGET_TYPE_DIMM
+/// @param[out] o_value module manufacturing id code
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 320 (bit 7~0), 321 (6~0)
+/// @note Item JEDEC Standard No. 21-C
+/// @note DDR4 SPD Document Release 3
+/// @note Page 4.1.2.12 - 54
+///
+fapi2::ReturnCode decoder::module_manufacturer_id_code(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint16_t& o_value)
+{
+
+ constexpr size_t BYTE_INDEX_MSB = 320;
+ uint8_t mfgid_MSB = iv_spd_data[BYTE_INDEX_MSB];
+
+ constexpr size_t BYTE_INDEX_LSB = 321;
+ uint8_t mfgid_LSB = iv_spd_data[BYTE_INDEX_LSB];
+
+ constexpr size_t MSB_START = 0;
+ constexpr size_t MSB_LEN = 8;
+ constexpr size_t LSB_START = 8;
+ constexpr size_t LSB_LEN = 8;
+
+ fapi2::buffer<uint16_t> l_buffer;
+ l_buffer.insertFromRight<MSB_START, MSB_LEN>( mfgid_MSB )
+ .insertFromRight<LSB_START, LSB_LEN>( mfgid_LSB );
+
+ o_value = l_buffer;
+
+ FAPI_INF("%s.Module Manufacturer ID Code: %x",
+ mss::c_str(i_target),
+ o_value);
+
+ // Returns "happy" until we can figure out a way to test this - AAM
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Decodes Module Manufacturing Location
+/// @param[in] i_target dimm target
+/// @param[out] o_value uint8_t identifier for manufacturing location of memory module
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 322
+/// @note Item JC-45-2220.01x
+/// @note Page 55
+/// @note DDR4 SPD Document Release 3
+///
+fapi2::ReturnCode decoder::module_manufacturing_location(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
+ uint8_t& o_value)
+{
+ // Trace in the front assists w/ debug
+ constexpr size_t BYTE_INDEX = 322;
+
+ FAPI_INF("%s SPD data at Byte %d: 0x%llX.",
+ mss::c_str(i_target),
+ BYTE_INDEX,
+ iv_spd_data[BYTE_INDEX]);
+
+ o_value = iv_spd_data[BYTE_INDEX];
+
+ FAPI_INF("%s. Module Manufacturing Location: %x",
+ mss::c_str(i_target),
+ o_value);
+
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Decodesmodule manufacturing date
+/// @param[in] i_target TARGET_TYPE_DIMM
+/// @param[out] o_value the 2 byte date of manufacturing in BCD format
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 323-324
+/// @note Item JEDEC Standard No. 21-C
+/// @note DDR4 SPD Document Release 2
+/// @note Page 4.1.2.12 - 54
+/// @note in Binary Coded Decimal (BCD)
+/// @note MSB = year, LSB = week
+///
+fapi2::ReturnCode decoder::module_manufacturing_date(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint16_t& o_value)
+{
+
+ constexpr size_t BYTE_INDEX_MSB = 323;
+ uint8_t date_MSB = iv_spd_data[BYTE_INDEX_MSB];
+
+ constexpr size_t BYTE_INDEX_LSB = 324;
+ uint8_t date_LSB = iv_spd_data[BYTE_INDEX_LSB];
+
+ constexpr size_t MSB_START = 0;
+ constexpr size_t MSB_LEN = 8;
+ constexpr size_t LSB_START = 8;
+ constexpr size_t LSB_LEN = 8;
+
+ //Using insertFromRight because IBM is backwards
+ fapi2::buffer<uint16_t> l_buffer;
+ l_buffer.insertFromRight<MSB_START, MSB_LEN>( date_MSB )
+ .insertFromRight<LSB_START, LSB_LEN>( date_LSB );
+
+ o_value = l_buffer;
+
+ FAPI_INF("%s.Module Manufacturer ID date: %x",
+ mss::c_str(i_target),
+ o_value);
+
+ // Returns "happy" until we can figure out a way to test this - AAM
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Decodes module's unique serial number
+/// @param[in] i_target TARGET_TYPE_DIMM
+/// @param[out] o_value
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 325-328
+/// @note Item JEDEC Standard No. 21-C
+/// @note DDR4 SPD Document Release 2
+/// @note Page 4.1.2.12 - 54
+/// @note in Binary Coded Decimal (BCD)
+///
+fapi2::ReturnCode decoder::module_serial_number(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint32_t& o_value)
+{
+ constexpr size_t BYTE_INDEX_0 = 325;
+ uint8_t sn_byte_0 = iv_spd_data[BYTE_INDEX_0];
+
+ constexpr size_t BYTE_INDEX_1 = 326;
+ uint8_t sn_byte_1 = iv_spd_data[BYTE_INDEX_1];
+
+ constexpr size_t BYTE_INDEX_2 = 327;
+ uint8_t sn_byte_2 = iv_spd_data[BYTE_INDEX_2];
+
+ constexpr size_t BYTE_INDEX_3 = 328;
+ uint8_t sn_byte_3 = iv_spd_data[BYTE_INDEX_3];
+
+ constexpr size_t START_BYTE_0 = 0;
+ constexpr size_t LEN_BYTE_0 = 8;
+ constexpr size_t START_BYTE_1 = 8;
+ constexpr size_t LEN_BYTE_1 = 8;
+ constexpr size_t START_BYTE_2 = 16;
+ constexpr size_t LEN_BYTE_2 = 8;
+ constexpr size_t START_BYTE_3 = 24;
+ constexpr size_t LEN_BYTE_3 = 8;
+
+ //Goes down the batting order, Inserts from left side because IBM
+ fapi2::buffer<uint32_t> l_buffer;
+ l_buffer.insertFromRight<START_BYTE_0, LEN_BYTE_0>( sn_byte_0 )
+ .insertFromRight<START_BYTE_1, LEN_BYTE_1>( sn_byte_1 )
+ .insertFromRight<START_BYTE_2, LEN_BYTE_2>( sn_byte_2 )
+ .insertFromRight<START_BYTE_3, LEN_BYTE_3>( sn_byte_3 );
+
+ o_value = l_buffer;
+
+ FAPI_INF("%s.Module Serial Number : %x",
+ mss::c_str(i_target),
+ o_value);
+
+ // Returns "happy" until we can figure out a way to test this - AAM
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Decodes Module Revision Code
+/// @param[in] i_target dimm target
+/// @param[out] o_value uint8_t identifier for revision code
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 349
+/// @note Item JC-45-2220.01x
+/// @note Page 55
+/// @note DDR4 SPD Document Release 3
+///
+fapi2::ReturnCode decoder::module_revision_code(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
+ uint8_t& o_value)
+{
+ // Trace in the front assists w/ debug
+ constexpr size_t BYTE_INDEX = 349;
+
+ FAPI_INF("%s SPD data at Byte %d: 0x%llX.",
+ mss::c_str(i_target),
+ BYTE_INDEX,
+ iv_spd_data[BYTE_INDEX]);
+
+ o_value = iv_spd_data[BYTE_INDEX];
+
+ FAPI_INF("%s. Module Revision Code: %x",
+ mss::c_str(i_target),
+ o_value);
+
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Decodes DRAM Manufacturer ID code
+/// @param[in] i_target TARGET_TYPE_DIMM
+/// @param[out] o_value dram manufacturing id code
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 350 351
+/// @note Item JEDEC Standard No. 21-C
+/// @note DDR4 SPD Document Release 2
+/// @note Page 4.1.2.12 - 54
+///
+fapi2::ReturnCode decoder::dram_manufacturer_id_code(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint16_t& o_value)
+{
+ constexpr size_t BYTE_INDEX_MSB = 350;
+ uint8_t mfgid_MSB = iv_spd_data[BYTE_INDEX_MSB];
+
+ constexpr size_t BYTE_INDEX_LSB = 351;
+ uint8_t mfgid_LSB = iv_spd_data[BYTE_INDEX_LSB];
+
+ constexpr size_t MSB_START = 0;
+ constexpr size_t MSB_LEN = 8;
+ constexpr size_t LSB_START = 8;
+ constexpr size_t LSB_LEN = 8;
+
+ fapi2::buffer<uint16_t> l_buffer;
+ l_buffer.insertFromRight<MSB_START, MSB_LEN>( mfgid_MSB )
+ .insertFromRight<LSB_START, LSB_LEN>( mfgid_LSB );
+
+ o_value = l_buffer;
+
+ FAPI_INF("%s.DRAM Manufacturer ID Code (dram_mfg_id): %x",
+ mss::c_str(i_target),
+ o_value);
+
+ // Returns "happy" until we can figure out a way to test this - AAM
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
+/// @brief Decodes DRAM Stepping
+/// @param[in] i_target dimm target
+/// @param[out] o_value uint8_t DRAM Stepping val
+/// @return FAPI2_RC_SUCCESS if okay
+/// @note SPD Byte 353
+/// @note Item JC-45-2220.01x
+/// @note Page 56
+/// @note DDR4 SPD Document Release 3
+/// @note also called die revision level
+///
+fapi2::ReturnCode decoder::dram_stepping(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
+ uint8_t& o_value)
+{
+ // Trace in the front assists w/ debug
+ constexpr size_t BYTE_INDEX = 352;
+
+ FAPI_INF("%s SPD data at Byte %d: 0x%01X.",
+ mss::c_str(i_target),
+ BYTE_INDEX,
+ iv_spd_data[BYTE_INDEX]);
+
+ o_value = iv_spd_data[BYTE_INDEX];
+
+ FAPI_INF("%s. DRAM stepping: %x",
+ mss::c_str(i_target),
+ o_value);
+ return fapi2::FAPI2_RC_SUCCESS;
+}
+
+///
/// @brief Returns Logical ranks in Primary SDRAM type
/// @param[in] i_target dimm target
+/// @param[in] i_target TARGET_TYPE_DIMM
/// @param[out] o_logical_ranks number of logical ranks
/// @return fapi2::FAPI2_RC_SUCCESS if okay
///
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H
index 3bfcdc4ab..fdffd3653 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/common/spd_decoder.H
@@ -100,7 +100,7 @@ enum factory_byte_extract
/// @param[in] i_spd_data the SPD data
/// @return extracted byte (right aligned)
///
-template<uint8_t I, uint8_t S, uint8_t L>
+template<size_t I, uint8_t S, uint8_t L>
inline uint8_t extract_spd_field(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
const std::vector<uint8_t>& i_spd_data)
{
@@ -421,12 +421,22 @@ class decoder
// Bytes 117 - 125 : Entire byte used
// Byte 126
+ CRC_LSB_START = 0,
+ CRC_LSB_LEN = 8,
+
+ // Byte 127
CRC_MSB_START = 0,
CRC_MSB_LEN = 8,
- // Byte 127
- CRC_LSB_START = 0,
- CRC_LSB_LEN = 8,
+ // Byte 320
+ // Skip SPD most signigicant bit, so our 0
+ MOD_MFG_LSB_START = 0,
+ MOD_MFG_LSB_LEN = 8,
+
+ // Byte 321
+ MOD_MFG_MSB_START = 0,
+ MOD_MFG_MSB_LEN = 8,
+
};
public:
@@ -1250,13 +1260,102 @@ class decoder
uint16_t& o_value);
///
+ /// @brief Decodes module manufacturer ID code
+ /// @param[in] i_target TARGET_TYPE_DIMM
+ /// @param[out] o_output module manufacturing id code
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 320 (bit 7~0), 321 (6~0)
+ /// @note Item JEDEC Standard No. 21-C
+ /// @note DDR4 SPD Document Release 3
+ /// @note Page 4.1.2.12 - 54
+ ///
+ virtual fapi2::ReturnCode module_manufacturer_id_code(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint16_t& o_value);
+ ///
+ /// @brief Decodes Module Manufacturing Location
+ /// @param[in] i_target dimm target
+ /// @param[out] o_value uint8_t identifier for manufacturing location of memory module
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 322
+ /// @note Item JC-45-2220.01x
+ /// @note Page 55
+ /// @note DDR4 SPD Document Release 3
+ ///
+ virtual fapi2::ReturnCode module_manufacturing_location(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint8_t& o_value);
+ ///
+ /// @brief Decodesmodule manufacturing date
+ /// @param[in] i_target TARGET_TYPE_DIMM
+ /// @param[out] o_output the 2 byte date of manufacturing in BCD format
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 323 & 324
+ /// @note Item JEDEC Standard No. 21-C
+ /// @note DDR4 SPD Document Release 2
+ /// @note Page 4.1.2.12 - 54
+ /// @note in Binary Coded Decimal (BCD)
+ /// @note MSB = year, LSB = week
+ ///
+ virtual fapi2::ReturnCode module_manufacturing_date(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint16_t& o_output);
+
+ ///
+ /// @brief Decodes module's unique serial number
+ /// @param[in] i_target TARGET_TYPE_DIMM
+ /// @param[out] o_output
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 325-328
+ /// @note Item JEDEC Standard No. 21-C
+ /// @note DDR4 SPD Document Release 2
+ /// @note Page 4.1.2.12 - 54
+ ///
+ virtual fapi2::ReturnCode module_serial_number(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint32_t& o_output);
+ ///
+ /// @brief Decodes Module Revision Code
+ /// @param[in] i_target dimm target
+ /// @param[out] o_value uint8_t identifier for revision code
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 349
+ /// @note Item JC-45-2220.01x
+ /// @note Page 55
+ /// @note DDR4 SPD Document Release 3
+ ///
+ virtual fapi2::ReturnCode module_revision_code(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint8_t& o_value);
+ ///
+ /// @brief Decodes DRAM Manufacturer ID code
+ /// @param[in] i_target TARGET_TYPE_DIMM
+ /// @param[out] o_output dram manufacturing id code
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 350 - 351
+ /// @note Item JEDEC Standard No. 21-C
+ /// @note DDR4 SPD Document Release 2
+ /// @note Page 4.1.2.12 - 54
+ ///
+ virtual fapi2::ReturnCode dram_manufacturer_id_code(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint16_t& o_output);
+ ///
+ /// @brief Decodes DRAM Stepping
+ /// @param[in] i_target dimm target
+ /// @param[out] o_value uint8_t DRAM Stepping val
+ /// @return FAPI2_RC_SUCCESS if okay
+ /// @note SPD Byte 352
+ /// @note Item JC-45-2220.01x
+ /// @note Page 56
+ /// @note DDR4 SPD Document Release 3
+ /// @note also called die revision level
+ ///
+ virtual fapi2::ReturnCode dram_stepping(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint8_t& o_value);
+
+ ///
/// @brief Returns Logical ranks per DIMM
/// @param[in] i_target dimm target
/// @param[out] o_logical_ranks number of logical ranks
/// @return fapi2::FAPI2_RC_SUCCESS if okay
///
virtual fapi2::ReturnCode logical_ranks_per_dimm(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
- uint8_t& o_logical_rank_per_dimm) ;
+ uint8_t& o_logical_rank_per_dimm);
protected:
// TODO RTC:159362
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H
index 4e3c5694a..98c3451f3 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder.H
@@ -211,7 +211,7 @@ class decoder_v1_0 : public dimm_module_decoder
virtual fapi2::ReturnCode num_continuation_codes(uint8_t& o_output) override;
///
- /// @brief Decodes manufacturer ID code
+ /// @brief Decodes register manufacturer ID code
/// @param[out] o_output drive strength encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
/// @note SPD Byte 134 (Bits 7~0)
@@ -219,7 +219,7 @@ class decoder_v1_0 : public dimm_module_decoder
/// @note DDR4 SPD Document Release 2
/// @note Page 4.1.2.12.2 - 58
///
- virtual fapi2::ReturnCode manufacturer_id_code(uint8_t& o_output) override;
+ virtual fapi2::ReturnCode reg_manufacturer_id_code(uint8_t& o_output) override;
///
/// @brief Decodes register revision number
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_0.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_0.C
index e46a09a50..a6d0664e7 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_0.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/lrdimm/lrdimm_decoder_v1_0.C
@@ -483,7 +483,7 @@ fapi_try_exit:
}
///
-/// @brief Decodes manufacturer ID code
+/// @brief Decodes register manufacturer ID code
/// @param[out] o_output drive strength encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
/// @note SPD Byte 134 (bit 7~0)
@@ -491,7 +491,7 @@ fapi_try_exit:
/// @note DDR4 SPD Document Release 2
/// @note Page 4.1.2.12.2 - 58
///
-fapi2::ReturnCode decoder_v1_0::manufacturer_id_code(uint8_t& o_output)
+fapi2::ReturnCode decoder_v1_0::reg_manufacturer_id_code(uint8_t& o_output)
{
constexpr size_t BYTE_INDEX = 134;
uint8_t l_raw_byte = iv_spd_data[BYTE_INDEX];
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H
index cd8818d67..63a87f93c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder.H
@@ -226,7 +226,7 @@ class rdimm_decoder_v1_0 : public dimm_module_decoder
virtual fapi2::ReturnCode num_continuation_codes(uint8_t& o_output) override;
///
- /// @brief Decodes manufacturer ID code
+ /// @brief Decodes register manufacturer ID code
/// @param[out] o_output drive strength encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
/// @note SPD Byte 133 (bit 6~0)
@@ -234,7 +234,7 @@ class rdimm_decoder_v1_0 : public dimm_module_decoder
/// @note DDR4 SPD Document Release 2
/// @note Page 4.1.2.12 - 51
///
- virtual fapi2::ReturnCode manufacturer_id_code(uint8_t& o_output) override;
+ virtual fapi2::ReturnCode reg_manufacturer_id_code(uint8_t& o_output) override;
///
/// @brief Decodes register revision number
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C
index 0e2643e8a..ad9257cae 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/rdimm/rdimm_decoder_v1_0.C
@@ -359,7 +359,7 @@ fapi_try_exit:
}
///
-/// @brief Decodes manufacturer ID code
+/// @brief Decodes register manufacturer ID code
/// @param[out] o_output drive strength encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
/// @note SPD Byte 134 (bit 7~0)
@@ -367,7 +367,7 @@ fapi_try_exit:
/// @note DDR4 SPD Document Release 2
/// @note Page 4.1.2.12 - 51
///
-fapi2::ReturnCode rdimm_decoder_v1_0::manufacturer_id_code(uint8_t& o_output)
+fapi2::ReturnCode rdimm_decoder_v1_0::reg_manufacturer_id_code(uint8_t& o_output)
{
constexpr size_t BYTE_INDEX = 134;
uint8_t l_raw_byte = iv_spd_data[BYTE_INDEX];
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