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authorBrian Silver <bsilver@us.ibm.com>2016-09-18 13:25:33 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-03-03 16:05:10 -0500
commit89233faf84171bec98a8f2c01abd9dd73db8b116 (patch)
treee3ce84638eea154f40f1ce6a82e2c9a7ab3e5f37 /src/import/chips/p9/procedures/hwp/memory/lib/spd
parente343aa0915640a081eba91a565fb3d2b9af2922c (diff)
downloadtalos-hostboot-89233faf84171bec98a8f2c01abd9dd73db8b116.tar.gz
talos-hostboot-89233faf84171bec98a8f2c01abd9dd73db8b116.zip
Change p9_mss_freq_system to write attributes, errors for Cronus
Honor the maximum support frequencies based on rank configs Remove the MEMVPD_FREQ attribute Fixup VPD tooling and accessors for new freq attrs Fix test case handling of master ranks Fix handling of empty MCS in Cronus Change-Id: I4492ceec0d060989d63c6a46e3375e1694dbc79f Original-Change-Id: I669ad0e81454f12368b484e826461ee76f7b9079 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29878 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37405 Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/spd')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C48
1 files changed, 47 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C
index 7f4a41f0b..5280ea185 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/spd/spd_factory.C
@@ -379,6 +379,49 @@ fapi_try_exit:
}
///
+/// @brief Determines & sets effective config for number of master ranks per dimm
+/// @param[in] i_target FAPI2 target
+/// @param[in] the SPD cache
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note This is done after the SPD cache is configured so that it can reflect the results of the
+/// factory and we don't need to worry about SPD versions. This is expressly different than the dram and dimm setters
+///
+static fapi2::ReturnCode master_ranks_per_dimm_setter(const fapi2::Target<TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<decoder>& i_pDecoder)
+{
+ const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target);
+ const auto l_mca = find_target<TARGET_TYPE_MCA>(i_target);
+
+ uint8_t l_decoder_val = 0;
+ fapi2::buffer<uint8_t> l_ranks_configed;
+ uint8_t l_attrs_master_ranks_per_dimm[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+ uint8_t l_attrs_dimm_ranks_configed[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {};
+
+ // Get & update MCS attribute
+ FAPI_TRY( i_pDecoder->num_package_ranks_per_dimm(i_target, l_decoder_val) );
+ FAPI_TRY(eff_num_master_ranks_per_dimm(l_mcs, &l_attrs_master_ranks_per_dimm[0][0]));
+ FAPI_TRY(eff_dimm_ranks_configed(l_mcs, &l_attrs_dimm_ranks_configed[0][0]));
+
+ l_attrs_master_ranks_per_dimm[index(l_mca)][index(i_target)] = l_decoder_val;
+
+ // Set configed ranks. Set the bit representing the master rank configured (0 being left most.) So,
+ // a 4R DIMM would be 0b11110000 (0xF0). This is used by PRD.
+ FAPI_TRY( l_ranks_configed.setBit(0, l_decoder_val) );
+ l_attrs_dimm_ranks_configed[index(l_mca)][index(i_target)] = l_ranks_configed;
+
+ FAPI_INF( "%s Num Master Ranks %d, DIMM Ranks Configed 0x%x",
+ mss::c_str(i_target),
+ l_attrs_master_ranks_per_dimm[index(l_mca)][index(i_target)],
+ l_attrs_dimm_ranks_configed[index(l_mca)][index(i_target)] );
+
+ FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM, l_mcs, l_attrs_master_ranks_per_dimm) );
+ FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_RANKS_CONFIGED, l_mcs, l_attrs_dimm_ranks_configed) );
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
/// @brief Object factory to select correct decoder
/// @param[in] i_target dimm target
/// @param[in] i_spd_data SPD data
@@ -534,13 +577,16 @@ fapi2::ReturnCode populate_decoder_caches( const fapi2::Target<TARGET_TYPE_MCS>&
o_factory_caches.emplace( std::make_pair( pos(l_dimm), l_pDecoder ) );
}
+ // Populate some of the DIMM attributes early. This allows the following code to make
+ // decisions based on DIMM information. Expressly done after the factory has decided on the SPD version
+ FAPI_TRY( master_ranks_per_dimm_setter(l_dimm, l_pDecoder) );
+
}// end dimm
fapi_try_exit:
return fapi2::current_err;
}
-
///
/// @brief Creates factory object & SPD data caches
/// @param[in] i_target the dimm target
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