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authorStephen Glancy <sglancy@us.ibm.com>2019-03-01 14:27:34 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-04-10 13:50:37 -0500
commitd27962f1bfbd74cde2eb3e643579e11db7ea77b5 (patch)
treeddf7944259576769fed238fa765fe777620b0722 /src/import/chips/p9/procedures/hwp/memory/lib/shared
parent8d531bced31e0dd68706db205b586c1e9e34b336 (diff)
downloadtalos-hostboot-d27962f1bfbd74cde2eb3e643579e11db7ea77b5.tar.gz
talos-hostboot-d27962f1bfbd74cde2eb3e643579e11db7ea77b5.zip
Updates CCS to run with quad encoded chip select
Change-Id: I29566f1a77d244fa7cbd600e7a83da9784a66f51 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72720 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72928 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/shared')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
index e61edfc78..db61b8afb 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H
@@ -211,6 +211,9 @@ enum ffdc_function_codes
// LR training function
DWL_CALL_OUT = 130,
MREP_CALL_OUT = 131,
+
+
+ CCS_INST_CONFIGURE_RANK = 132,
};
// Static consts describing the bits used in the cal_step_enable attribute
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