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author | Jacob Harvey <jlharvey@us.ibm.com> | 2016-02-05 15:24:59 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-04-01 21:23:21 -0400 |
commit | dba9ee6be396b29a072d9c5fc87ff346542c396e (patch) | |
tree | d3edf1b1207aad6dd8d7b9b93473067be1dd6e48 /src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H | |
parent | a08c13b301d1ee48a40474261711c6dc8174b108 (diff) | |
download | talos-hostboot-dba9ee6be396b29a072d9c5fc87ff346542c396e.tar.gz talos-hostboot-dba9ee6be396b29a072d9c5fc87ff346542c396e.zip |
Fixed doxygen errors and typos
Change-Id: I86313e4af81003744f0ab6c507d019a39c4a4992
Original-Change-Id: I94120c654c32b5c3513740ce8aae4b4cc632fc41
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24281
Tested-by: Jenkins Server
Reviewed-by: Andre A. Marin <aamarin@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22767
Tested-by: FSP CI Jenkins
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H | 50 |
1 files changed, 24 insertions, 26 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H index f5f962516..998b6ed46 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,8 +40,8 @@ namespace dp16 /// /// @brief Configure the DP16 sysclk -/// @tparam T, the fapi2 target type -/// @param[in] a target +/// @tparam T the fapi2 target type +/// @param[in] i_target a target /// @return FAPI2_RC_SUCCESs iff ok /// template< fapi2::TargetType T > @@ -49,7 +49,7 @@ fapi2::ReturnCode setup_sysclk( const fapi2::Target<T>& i_target ); /// /// @brief Configure the DP16 sysclk -/// @param[in] a MCBIST target +/// @param[in] i_target a MCBIST target /// @return FAPI2_RC_SUCCESs iff ok /// template<> @@ -57,9 +57,9 @@ fapi2::ReturnCode setup_sysclk( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& /// /// @brief Reset the training delay configureation -/// @tparam T, the type of the port -/// @param[in] the port target -/// @param[in] vector of rank pairs +/// @tparam T the type of the port +/// @param[in] i_target the port target +/// @param[in] l_rank_pairs vector of rank pairs /// @return FAPI2_RC_SUCCES iff ok /// template< fapi2::TargetType T> @@ -68,8 +68,8 @@ fapi2::ReturnCode reset_delay_values( const fapi2::Target<T>& i_target, /// /// @brief Reset the training delay configureation -/// @param[in] the port target -/// @param[in] vector of rank pairs +/// @param[in] i_target the port target +/// @param[in] l_rank_pairs vector of rank pairs /// @return FAPI2_RC_SUCCES iff ok /// template<> @@ -78,9 +78,9 @@ fapi2::ReturnCode reset_delay_values( const fapi2::Target<fapi2::TARGET_TYPE_MCA /// /// @brief Write the read clock enable registers -/// @tparam T, the type of the port -/// @param[in] a port target -/// @param[in] vector of rank pairs +/// @tparam T the type of the port +/// @param[in] i_target a port target +/// @param[in] l_rank_pairs vector of rank pairs /// @return FAPI2_RC_SUCCES iff ok /// template< fapi2::TargetType T> @@ -89,8 +89,8 @@ fapi2::ReturnCode read_clock_enable( const fapi2::Target<T>& i_target, /// /// @brief Write the clock enable registers -/// @param[in] a port target -/// @param[in] vector of rank pairs +/// @param[in] i_target a port target +/// @param[in] l_rank_pairs vector of rank pairs /// @return FAPI2_RC_SUCCES iff ok /// template<> @@ -99,9 +99,9 @@ fapi2::ReturnCode read_clock_enable( const fapi2::Target<fapi2::TARGET_TYPE_MCA> /// /// @brief Write the clock enable registers -/// @tparam T, the type of the port -/// @param[in] a port target -/// @param[in] vector of rank pairs +/// @tparam T the type of the port +/// @param[in] i_target a port target +/// @param[in] l_rank_pairs vector of rank pairs /// @return FAPI2_RC_SUCCES iff ok /// template< fapi2::TargetType T> @@ -110,8 +110,8 @@ fapi2::ReturnCode write_clock_enable( const fapi2::Target<T>& i_target, /// /// @brief Write the clock enable registers -/// @param[in] a port target -/// @param[in] vector of rank pairs +/// @param[in] i_target a port target +/// @param[in] l_rank_pairs vector of rank pairs /// @return FAPI2_RC_SUCCES iff ok /// template<> @@ -120,9 +120,8 @@ fapi2::ReturnCode write_clock_enable( const fapi2::Target<fapi2::TARGET_TYPE_MCA /// /// @brief Write the data bit enable registers -/// @tparam T, the type of the port -/// @param[in] a port target -/// @param[in] vector of port pairs +/// @tparam T the type of the port +/// @param[in] i_target a port target /// @return FAPI2_RC_SUCCESs iff ok /// template< fapi2::TargetType T> @@ -130,8 +129,7 @@ fapi2::ReturnCode write_data_bit_enable( const fapi2::Target<T>& i_target ); /// /// @brief Write the data bit enable registers -/// @param[in] a port target -/// @param[in] vector of port pairs +/// @param[in] i_target a port target /// @return FAPI2_RC_SUCCESs iff ok /// template<> @@ -140,7 +138,7 @@ fapi2::ReturnCode write_data_bit_enable( const fapi2::Target<fapi2::TARGET_TYPE_ /// /// @brief Setup the bad-bits masks for a port /// @tparam T the fapi2::TargetType -/// @param[in] the target (MCA or MBA?) +/// @param[in] i_target the target (MCA or MBA?) /// @return FAPI2_RC_SUCCESS if and only if ok /// template< fapi2::TargetType T> @@ -149,7 +147,7 @@ inline fapi2::ReturnCode set_bad_bits(const fapi2::Target<T>& i_target); /// /// @brief Setup the bad-bits masks for a port /// @tparam T the fapi2::TargetType -/// @param[in] the target (MCA or MBA?) +/// @param[in] i_target the target (MCA or MBA?) /// @return FAPI2_RC_SUCCESS if and only if ok /// template<> |