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author | Brian Silver <bsilver@us.ibm.com> | 2016-08-08 09:03:11 -0500 |
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committer | William G. Hoffa <wghoffa@us.ibm.com> | 2016-08-09 14:43:36 -0400 |
commit | 3ff91b140cf5795c1d6ce1114e7cef6b35e27727 (patch) | |
tree | b02186e38d19a5e8a71bc394396fc2e4d2305bf9 /src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H | |
parent | d54c522395bb266a125b4fe1d2a96578f3edd5c4 (diff) | |
download | talos-hostboot-3ff91b140cf5795c1d6ce1114e7cef6b35e27727.tar.gz talos-hostboot-3ff91b140cf5795c1d6ce1114e7cef6b35e27727.zip |
Add init CTLE from VPD
Fix AC Boost; bad register, templated buffer ops
Change-Id: I0f1e574e60ff791e361d0cea81261928516376fd
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27984
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27989
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H | 70 |
1 files changed, 70 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H index b8e8067d7..81fe55eec 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H @@ -126,6 +126,7 @@ class dp16Traits<fapi2::TARGET_TYPE_MCA> // Vectors of DP16 registers. The pair represents the two DLL in per DP16 static const std::vector< std::pair<uint64_t, uint64_t> > DLL_CNFG_REG; static const std::vector< std::pair<uint64_t, uint64_t> > AC_BOOST_CNTRL_REG; + static const std::vector< std::pair<uint64_t, uint64_t> > CTLE_CNTRL_REG; static const std::vector< uint64_t > DATA_BIT_DIR1; enum @@ -141,6 +142,15 @@ class dp16Traits<fapi2::TARGET_TYPE_MCA> AC_BOOST_WR_UP_LEN = MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_0_01_S0ACENSLICEPDRV_DC_LEN, AC_BOOST_RD_UP = MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPTERM_DC, AC_BOOST_RD_UP_LEN = MCA_DDRPHY_DP16_ACBOOST_CTL_BYTE0_P0_1_01_S0ACENSLICEPTERM_DC_LEN, + + CTLE_EVEN_CAP = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_CAP, + CTLE_EVEN_CAP_LEN = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_CAP_LEN, + CTLE_EVEN_RES = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_RES, + CTLE_EVEN_RES_LEN = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_2_DQSEL_RES_LEN, + CTLE_ODD_CAP = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_CAP, + CTLE_ODD_CAP_LEN = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_CAP_LEN, + CTLE_ODD_RES = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_RES, + CTLE_ODD_RES_LEN = MCA_DDRPHY_DP16_CTLE_CTL_BYTE0_P0_0_01_NIB_1_3_DQSEL_RES_LEN, }; }; @@ -266,6 +276,66 @@ template< fapi2::TargetType T, typename TT = dp16Traits<T> > fapi2::ReturnCode reset_ac_boost_cntl( const fapi2::Target<T>& i_target ); /// +/// @brief Read CTLE +/// @tparam I DP16 instance +/// @tparam T fapi2 Target Type - derived +/// @tparam P the type of the std::pair elements +/// @tparam TT traits type defaults to dp16Traits<T> +/// @param[in] i_target the fapi2 target of the port +/// @param[out] o_data the value of both of the the registers (upper and lower bytes) +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// +template< uint64_t I, fapi2::TargetType T, typename P, typename TT = dp16Traits<T> > +inline fapi2::ReturnCode read_ctle_cntl( const fapi2::Target<T>& i_target, + std::pair<P, P>& o_data ) +{ + static_assert( I < TT::DP_COUNT, "dp16 instance out of range"); + + // The pair represents the upper and lower bytes of the DP16 - each has its own boost regiters + FAPI_TRY( mss::getScom(i_target, TT::CTLE_CNTRL_REG[I].first, o_data.first) ); + FAPI_TRY( mss::getScom(i_target, TT::CTLE_CNTRL_REG[I].second, o_data.second) ); + FAPI_INF("ctle_cntl dp16<%d>: 0x%016lx, 0x%016lx", I, o_data.first, o_data.second); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Write CTLE +/// @tparam I DP16 instance +/// @tparam T fapi2 Target Type - derived +/// @tparam P the type of the std::pair elements +/// @tparam TT traits type defaults to dp16Traits<T> +/// @param[in] i_target the fapi2 target of the port +/// @param[in] i_data the value of both of the the registers (upper and lower bytes) +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// +template< uint64_t I, fapi2::TargetType T, typename P, typename TT = dp16Traits<T> > +inline fapi2::ReturnCode write_ctle_cntl( const fapi2::Target<T>& i_target, + const std::pair<P, P>& i_data ) +{ + static_assert( I < TT::DP_COUNT, "dp16 instance out of range"); + + // The pair represents the upper and lower bytes of the DP16 - each has its own boost regiters + FAPI_INF("ctle_cntl dp16<%d>: 0x%016lx, 0x%016lx", I, i_data.first, i_data.second); + FAPI_TRY( mss::putScom(i_target, TT::CTLE_CNTRL_REG[I].first, i_data.first) ); + FAPI_TRY( mss::putScom(i_target, TT::CTLE_CNTRL_REG[I].second, i_data.second) ); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Reset CTLE - for all DP16 in the target +/// @tparam T fapi2 Target Type - derived +/// @tparam TT traits type defaults to dp16Traits<T> +/// @param[in] i_target the fapi2 target of the port +/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok +/// +template< fapi2::TargetType T, typename TT = dp16Traits<T> > +fapi2::ReturnCode reset_ctle_cntl( const fapi2::Target<T>& i_target ); + +/// /// @brief Set the DLL cal reset (begins DLL cal operations) /// @tparam T fapi2 Target Type - defaults to TARGET_TYPE_MCA /// @tparam TT traits type defaults to dp16Traits<T> |