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author | Brian Silver <bsilver@us.ibm.com> | 2016-09-14 13:20:28 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2016-09-20 14:10:42 -0400 |
commit | 1caeae646b0230b763a49555f1314a324a22493f (patch) | |
tree | 7d166946db9fe568714e231fbcb75313172ceac1 /src/import/chips/p9/procedures/hwp/memory/lib/mcbist | |
parent | d4ad36ca10f64fc5028a2050d96bc46706288bbe (diff) | |
download | talos-hostboot-1caeae646b0230b763a49555f1314a324a22493f.tar.gz talos-hostboot-1caeae646b0230b763a49555f1314a324a22493f.zip |
Change VPD to better account for deconfigured chiplets
Update VPD blob creation for deconfiged chiplets
Update decoder to not skip VPD for mising chiplets
Correct actions for BB lock
Change-Id: Id84e485f803d3ee033af61c1b313b19a03dbf38f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29697
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29700
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mcbist')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C | 6 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C | 8 |
2 files changed, 14 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C index 27de1c1f2..1c693bd36 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C @@ -219,6 +219,12 @@ fapi2::ReturnCode execute( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, bool l_poll_result = false; poll_parameters l_poll_parameters; + // Before we go off into the bushes, lets see if there are any instructions in the + // program. If not, we can save everyone the hassle + FAPI_ASSERT(0 != i_program.iv_subtests.size(), + fapi2::MSS_MEMDIAGS_NO_MCBIST_SUBTESTS().set_TARGET(i_target), + "Attempt to run an MCBIST program with no subtests on %s", mss::c_str(i_target)); + FAPI_TRY( clear_errors(i_target) ); // Slam the address generator config diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C index 50d79b40b..cd92114f3 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C @@ -40,6 +40,7 @@ #include <lib/mcbist/mcbist.H> #include <lib/mcbist/patterns.H> #include <lib/mcbist/sim.H> +#include <lib/utils/count_dimm.H> using fapi2::TARGET_TYPE_MCBIST; using fapi2::TARGET_TYPE_MCA; @@ -79,6 +80,13 @@ fapi2::ReturnCode sf_init( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, size_t l_rank_address_pair = 0; + // No point in bothering if we don't have any DIMM + if (mss::count_dimm(p) == 0) + { + FAPI_INF("No DIMM on %s, not running sf_init", mss::c_str(p)); + continue; + } + // In sim we know a few things ... // Get the primary ranks for this port. We know there can only be 4, and we know we only trained the primary // ranks. Therefore, we only need to clean up the primary ranks. And because there's 4 max, we can do it |