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authorBrian Silver <bsilver@us.ibm.com>2016-06-02 06:28:57 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-06-10 14:46:49 -0400
commit3d485fbdab55175f716253b4fe4c52835c93a5a0 (patch)
tree1a36d89d454e170b69d0b93e921033d1e1512722 /src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C
parent0c34e40e9061b3431e294931659dc67c8f340130 (diff)
downloadtalos-hostboot-3d485fbdab55175f716253b4fe4c52835c93a5a0.tar.gz
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Add memdiags scrub capability
Change-Id: I1f42c836a8fc4ff3ca31401ec53f2a3aeda77513 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25376 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server Tested-by: Hostboot CI Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25377 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C
index 029072fe9..8e6aca12b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/sim.C
@@ -88,9 +88,8 @@ fapi2::ReturnCode sf_init( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target,
// Setup l_start to represent this rank, and then make the end address from that.
l_start.set_master_rank(*r);
- l_start.get_range<mss::mcbist::address::COL>(l_end);
// Set C3 bit to get an entire cache line
- l_end.set_field<mss::mcbist::address::COL>(0b1000000);
+ l_start.get_sim_end_address(l_end);
// By default we're in maint address mode, not address counting mode. So we give it a start and end, and ignore
// anything invalid - that's what maint address mode is all about
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