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| author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-09-20 13:31:31 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-29 12:55:42 -0400 |
| commit | 020bcf3046cd8b1afb476cd48de3777f9b3413b3 (patch) | |
| tree | 5f0fe0a4161be0c449bbe02ac6c411105bc8e33d /src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C | |
| parent | 4f4a04caf1feb500727d6411b82b5e054ee3b44d (diff) | |
| download | talos-hostboot-020bcf3046cd8b1afb476cd48de3777f9b3413b3.tar.gz talos-hostboot-020bcf3046cd8b1afb476cd48de3777f9b3413b3.zip | |
Clear bit 56/ ddr_phy fir bit 2 after dram cal
Change-Id: Ie06fc3ed9263ce5e67f02eefdf2d51ab8770d553
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46526
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Dev-Ready: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46547
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C | 15 |
1 files changed, 6 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C index e0615943f..58f1f0d94 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C @@ -197,17 +197,10 @@ fapi2::ReturnCode during_draminit_training( const fapi2::Target<fapi2::TARGET_TY const auto& l_mca = mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target); // Creating a mask to check for FIR errors. - // These are DP16 parity errors that would be triggered in case of a general PHY error + // These are DP16 parity errors that would be triggered in case of an init cal error // During draminit_training, this would mean a training error dealing with the PHY fapi2::buffer<uint64_t> l_phyfir_mask; - l_phyfir_mask.setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_0>() - .setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_1>() - .setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_2>() - .setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_3>() - .setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_4>() - .setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_5>() - .setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_6>() - .setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_7>(); + l_phyfir_mask.setBit<MCA_IOM_PHY0_DDRPHY_FIR_REG_ERROR_2>(); fapi2::buffer<uint64_t> l_phyfir_data; fapi2::buffer<uint64_t> l_phyfir_masked; @@ -216,6 +209,10 @@ fapi2::ReturnCode during_draminit_training( const fapi2::Target<fapi2::TARGET_TY l_phyfir_masked = l_phyfir_data & l_phyfir_mask; + // Clear the PHY FIR ERROR 2 bit so we don't keep failing training and training advance on this port + // We'll have the error log to know what fir bit triggered and when, so we should be fine clearing here + FAPI_TRY( mss::putScom(l_mca, MCA_IOM_PHY0_DDRPHY_FIR_REG_AND, l_phyfir_mask.invert()) ); + FAPI_ASSERT( l_phyfir_masked == 0, fapi2::MSS_DRAMINIT_TRAINING_PORT_FIR() .set_PHY_FIR(l_phyfir_masked) |
