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author | Louis Stermole <stermole@us.ibm.com> | 2018-10-02 10:41:42 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-12-04 11:09:10 -0600 |
commit | 6a6ee6a74bce17f8ee9dd2c6729392dc62763896 (patch) | |
tree | c5b4b536b42e49b0c679120a0300f39ac014400b /src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_mss_voltage.C | |
parent | 8b6b1b256035236d5434760729a1263305939a1f (diff) | |
download | talos-hostboot-6a6ee6a74bce17f8ee9dd2c6729392dc62763896.tar.gz talos-hostboot-6a6ee6a74bce17f8ee9dd2c6729392dc62763896.zip |
Move MSS volt attr setters to generic folder
Change-Id: I0011160cb34c1dffe54ff5eee3b629e91e3578c2
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67103
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67296
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_mss_voltage.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_mss_voltage.C | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_mss_voltage.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_mss_voltage.C index 220853338..d895897ca 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_mss_voltage.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/nimbus_mss_voltage.C @@ -22,3 +22,99 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file nimbus_mss_voltage.C +/// @brief Nimbus specializations for voltage library +/// +// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com> +// *HWP HWP Backup: Louis Stermole <stermole@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 3 +// *HWP Consumed by: HB:FSP + +#include <fapi2.H> +#include <vector> + +// Memory libraries +#include <lib/mss_attribute_accessors.H> +#include <lib/shared/mss_const.H> + +// Generic libraries +#include <generic/memory/lib/utils/shared/mss_generic_consts.H> +#include <generic/memory/lib/utils/find.H> +#include <generic/memory/lib/spd/spd_facade.H> +#include <generic/memory/lib/utils/voltage/gen_mss_voltage_traits.H> +#include <generic/memory/lib/utils/voltage/gen_mss_volt.H> + +namespace mss +{ + +using TT = mss::voltage_traits<mss::mc_type::NIMBUS, mss::spd::device_type::DDR4>; + +// List of attribute setter functions for setting voltage rail values +// Note that this list needs to be ordered the same way as the list returned by mss::get_supported_voltages +const std::vector<fapi2::ReturnCode (*)(const fapi2::Target<TT::VOLTAGE_TARGET_TYPE>&, uint32_t)> TT::voltage_setters = +{ + &set_volt_vddr, + &set_volt_vpp, +}; + +/// +/// @brief Determine what voltages are supported for the given memory controller and DRAM generation +/// @param[in] i_target the target for setting voltage attributes +/// @param[out] o_supported_dram_voltages vector of supported rail voltages in millivolts to be used in set_voltage_attributes +/// @return FAPI2_RC_SUCCESS iff ok +/// @note NIMBUS, DDR4 specialization +/// +template<> +fapi2::ReturnCode get_supported_voltages<mss::mc_type::NIMBUS, mss::spd::device_type::DDR4> +(const fapi2::Target<TT::SPD_TARGET_TYPE>& i_target, + std::vector<uint32_t>& o_supported_dram_voltages) +{ + o_supported_dram_voltages.clear(); + + FAPI_INF("Populating decoder cache for %s", mss::c_str(i_target)); + + //Factory cache is per MCS + std::vector< mss::spd::facade > l_spd_facades; + FAPI_TRY( get_spd_decoder_list(i_target, l_spd_facades) ); + + // Get dimms for each MCS + for ( const auto& l_cache : l_spd_facades ) + { + const auto l_dimm = l_cache.get_dimm_target(); + uint8_t l_dimm_nominal = 0; + uint8_t l_dimm_endurant = 0; + + // Read nominal and endurant bits from SPD, 0 = 1.2V is not operable and endurant, 1 = 1.2 is valid + FAPI_TRY( l_cache.operable_nominal_voltage(l_dimm_nominal) ); + FAPI_TRY( l_cache.endurant_nominal_voltage(l_dimm_endurant) ); + + // Check to make sure 1.2 V is both operable and endurant, fail if it is not + FAPI_ASSERT ( (l_dimm_nominal == mss::spd::OPERABLE) && (l_dimm_endurant == mss::spd::ENDURANT), + fapi2::MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE(). + set_ACTUAL_OPERABLE(l_dimm_nominal). + set_ACTUAL_ENDURANT(l_dimm_endurant). + set_EXPECTED_OPERABLE(mss::spd::OPERABLE). + set_EXPECTED_ENDURANT(mss::spd::ENDURANT). + set_DIMM_TARGET(l_dimm), + "%s: DIMM is not operable (%d) expected (%d)" + " and/or endurant (%d) expected (%d) at 1.2V", + mss::c_str(l_dimm), + l_dimm_nominal, + mss::spd::OPERABLE, + l_dimm_endurant, + mss::spd::ENDURANT); + } // l_dimm + + // Set the attributes for this MCS, values are in mss_const.H + // The ordering of voltages is specified in the selected voltage_traits specialization + o_supported_dram_voltages.push_back(mss::DDR4_NOMINAL_VOLTAGE); + o_supported_dram_voltages.push_back(mss::DDR4_VPP_VOLTAGE); + +fapi_try_exit: + return fapi2::current_err; +} + +} // ns mss |