Updates PBA to use RCW's to issue BCW's

During LDIMM bringup it was found that function space
changes do not work during PBA. This fix uses
RCW's to issue BCW's avoiding function space changes

Change-Id: I86518269447e14fda386c780ec7a9ba99c90cdcc
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68528
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Devon A. Baughen <devon.baughen1@ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68529
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

3 files changed, 75 insertions, 3 deletions

diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H
index 00f06bf93..ab980a962 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H
@@ -47,7 +47,6 @@
 
 namespace mss
 {
-// TK:LRDIMM Verify this functionality and data (looked good to me, but more eyes are better - SPG)
 
 enum nibble : size_t
 {
@@ -492,6 +491,79 @@ fapi_try_exit:
     return fapi2::current_err;
 }
 
+///
+/// @brief Converts inputed control words into RC06 control word writes
+/// @param[in] i_cws
+/// @param[in] i_delay - delay between commands defaults to 16 - tBCW
+/// @return converted CW commmands
+///
+inline std::vector<cw_info> convert_to_rcws(const std::vector<cw_info>& i_cws, const uint8_t i_delay = tbcw())
+{
+    std::vector<cw_info> l_converted;
+
+    // Loops through all of the BCW's
+    for(const auto& l_cw : i_cws)
+    {
+        constexpr uint64_t RX4X_FUNC_SPACE = 0;
+        constexpr uint64_t RX4X_FUNC_SPACE_LEN = 3;
+        constexpr uint64_t RX4X_BCW = 3;
+        constexpr uint64_t RX4X_A11_TO_8 = 4;
+        constexpr uint64_t RX4X_A11_TO_8_LEN = 4;
+        // 1) Set RC4x: CW Source Selection Control Word for A12 High for given function Space + BCW number (for 8 bit BCW's)
+        fapi2::buffer<uint8_t> l_data;
+
+        // Function space
+        l_data.insertFromRight<RX4X_FUNC_SPACE, RX4X_FUNC_SPACE_LEN>(l_cw.iv_cw_data.iv_func_space);
+
+        // BCW vs RCW
+        l_data.writeBit<RX4X_BCW>(l_cw.iv_is_bcw);
+
+        // Only write this if we're an 8 bit CW
+        if(l_cw.iv_data_len == CW8_DATA_LEN)
+        {
+            l_data.insertFromRight<RX4X_A11_TO_8, RX4X_A11_TO_8_LEN>(l_cw.iv_cw_data.iv_number);
+        }
+
+        l_converted.push_back({FUNC_SPACE_0, 4, uint8_t(l_data),  i_delay, CW8_DATA_LEN, cw_info::RCW});
+
+        // 2) Set RC5x: CW Destination Selection & Wr/Rd Additional QxODT[1:0] Signal High just blast to 0 for firmware
+        l_data = 0;
+        l_converted.push_back({FUNC_SPACE_0, 5, uint8_t(l_data),  i_delay, CW8_DATA_LEN, cw_info::RCW});
+
+        // 3) Set RC6x: CW Data for a BCW Write operation
+        l_data = 0;
+
+        constexpr uint64_t RX6X_4BIT_BCW_NUMBER = 0;
+        constexpr uint64_t RX6X_4BIT_BCW_NUMBER_LEN = 4;
+        constexpr uint64_t RX6X_4BIT_BCW_DATA = 4;
+        constexpr uint64_t RX6X_4BIT_BCW_DATA_LEN = 4;
+
+        if(l_cw.iv_data_len == CW8_DATA_LEN)
+        {
+            l_data = l_cw.iv_cw_data.iv_data;
+        }
+        else
+        {
+            l_data.insertFromRight<RX6X_4BIT_BCW_NUMBER, RX6X_4BIT_BCW_NUMBER_LEN>(l_cw.iv_cw_data.iv_number)
+            .insertFromRight<RX6X_4BIT_BCW_DATA, RX6X_4BIT_BCW_DATA_LEN>(l_cw.iv_cw_data.iv_data);
+        }
+
+        l_converted.push_back({FUNC_SPACE_0, 6, uint8_t(l_data),  i_delay, CW8_DATA_LEN, cw_info::RCW});
+
+        // 4) Set RC06: BCW WR command
+        constexpr uint8_t RC06_BCW = 5;
+        l_converted.push_back({FUNC_SPACE_0, 6, RC06_BCW,  i_delay, CW4_DATA_LEN, cw_info::RCW});
+    }
+
+    // Make sure to clear 4x/5x/6x
+    l_converted.push_back({FUNC_SPACE_0, 4, uint64_t(0), i_delay, CW8_DATA_LEN, cw_info::RCW});
+    l_converted.push_back({FUNC_SPACE_0, 5, uint64_t(0), i_delay, CW8_DATA_LEN, cw_info::RCW});
+    l_converted.push_back({FUNC_SPACE_0, 6, uint64_t(0), i_delay, CW8_DATA_LEN, cw_info::RCW});
+
+    return l_converted;
+}
+
+
 } // namespace ddr4
 } // namespace mss
 
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.C
index 6a49c1391..3fc0e0bb6 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.C
@@ -205,8 +205,7 @@ fapi2::ReturnCode execute_commands( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>
         l_program.iv_instructions.push_back(mss::ccs::des_command<fapi2::TARGET_TYPE_MCBIST>());
 
         // Makes a copy of the vector, so we can do the function space swaps correctly
-        auto l_bcws = i_bcws;
-        FAPI_TRY(insert_function_space_select(l_bcws));
+        auto l_bcws = convert_to_rcws(i_bcws, commands::BCW_DELAY);
 
 
         FAPI_TRY(control_word_engine(i_target,
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.H
index 647e0453f..34706d492 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/pba.H
@@ -95,6 +95,7 @@ fapi2::ReturnCode exit( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target )
 class commands
 {
     public:
+        static constexpr uint8_t BCW_DELAY = 255;
         using DIMM_TARGET = fapi2::Target<fapi2::TARGET_TYPE_DIMM>;
         using BCW_MAP = std::map<uint64_t, std::vector<cw_info>>;