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author | Matthew Hickman <Matthew.Hickman@ibm.com> | 2019-04-15 16:32:46 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-05-13 10:46:41 -0500 |
commit | 2b3c06d520853a436ac78050482168752dcd6efd (patch) | |
tree | 468501e635d138c36c7ba9265a80de9f29093730 /src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C | |
parent | d893f5ac1b3d25eb3bf7799bb601afe8406c7cbc (diff) | |
download | talos-hostboot-2b3c06d520853a436ac78050482168752dcd6efd.tar.gz talos-hostboot-2b3c06d520853a436ac78050482168752dcd6efd.zip |
Fixed the ccs port merge conflicts and added lab code
Change-Id: I665ea2460a5ace289b17ae868b07a8876b65a0c8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75236
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76885
Reviewed-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C index 6e53bddd8..e522f970f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/zqcal.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2017 */ +/* Contributors Listed Below - COPYRIGHT 2017,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -36,13 +36,17 @@ #include <lib/shared/nimbus_defaults.H> #include <vector> #include <fapi2.H> +#include <lib/shared/mss_const.H> #include <lib/dimm/ddr4/zqcal.H> #include <lib/dimm/ddr4/data_buffer_ddr4.H> -#include <lib/ccs/ccs.H> +#include <lib/mc/port.H> +#include <lib/ccs/ccs_traits_nimbus.H> +#include <generic/memory/lib/ccs/ccs.H> #include <lib/eff_config/timing.H> #include <lib/workarounds/ccs_workarounds.H> + using fapi2::TARGET_TYPE_MCBIST; using fapi2::TARGET_TYPE_MCA; using fapi2::TARGET_TYPE_DIMM; @@ -61,15 +65,15 @@ namespace mss template<> fapi2::ReturnCode setup_dram_zqcal( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const uint64_t i_rank, - std::vector< ccs::instruction_t<fapi2::TARGET_TYPE_MCBIST> >& io_inst) + std::vector< ccs::instruction_t >& io_inst) { - ccs::instruction_t<TARGET_TYPE_MCBIST> l_inst; + ccs::instruction_t l_inst; uint64_t tDLLK = 0; FAPI_TRY( mss::tdllk(i_target, tDLLK) ); // Note: this isn't general - assumes Nimbus via MCBIST instruction here BRS - l_inst = ccs::zqcl_command<TARGET_TYPE_MCBIST>(i_rank); + l_inst = ccs::zqcl_command(i_rank); // Doubling tZQ to better margin per lab request { @@ -98,7 +102,7 @@ fapi_try_exit: /// template<> fapi2::ReturnCode setup_data_buffer_zqcal( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - std::vector< ccs::instruction_t<fapi2::TARGET_TYPE_MCBIST> >& io_inst) + std::vector< ccs::instruction_t >& io_inst) { // For LRDIMMs, program BCW to send ZQCal Long command to all data buffers // in broadcast mode @@ -128,7 +132,7 @@ template<> fapi2::ReturnCode setup_and_execute_zqcal( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, const fapi2::buffer<uint32_t>& i_cal_steps_enabled) { - mss::ccs::program<TARGET_TYPE_MCBIST> l_program; + mss::ccs::program l_program; for ( const auto& d : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) ) { |