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| author | Brian Silver <bsilver@us.ibm.com> | 2016-07-21 06:54:06 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-12 09:34:25 -0400 |
| commit | 4f1561707bd1fe443f5f5aa1c2ac3fe8e680e27f (patch) | |
| tree | 117ce297d1c92ac5be3eca3c62266a2f19e26a52 /src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C | |
| parent | 1ef3d4977fde69c822f4d0751fe9872f69f93a33 (diff) | |
| download | talos-hostboot-4f1561707bd1fe443f5f5aa1c2ac3fe8e680e27f.tar.gz talos-hostboot-4f1561707bd1fe443f5f5aa1c2ac3fe8e680e27f.zip | |
Add mrs_one_shot to the MSS Lab code
Change-Id: I84fd2f29f4b3d8581a6ff8c0f8a2688cc0cf645a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27373
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27375
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C index 5f647d1c1..4f0aa32e4 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs05.C @@ -216,5 +216,13 @@ fapi2::ReturnCode mrs05_decode(const ccs::instruction_t<TARGET_TYPE_MCBIST>& i_i return FAPI2_RC_SUCCESS; } +fapi2::ReturnCode (*mrs05_data::make_ccs_instruction)(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const mrs05_data& i_data, + ccs::instruction_t<fapi2::TARGET_TYPE_MCBIST>& io_inst, + const uint64_t i_rank) = &mrs05; + +fapi2::ReturnCode (*mrs05_data::decode)(const ccs::instruction_t<fapi2::TARGET_TYPE_MCBIST>& i_inst, + const uint64_t i_rank) = &mrs05_decode; + } // ns ddr4 } // ns mss |
