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authorGreg Still <stillgs@us.ibm.com>2016-05-03 15:56:40 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-07-22 10:51:57 -0400
commitb4a8d8383f5fcf1099dcb79de85b4352da1fa56d (patch)
tree11c949a4f47310ae6f58524c732936b498386998 /src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C
parent4b34887ef1df3acb78ba6227bdaf0f93addfd241 (diff)
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Pstate Parameter Block structure
- Added VDM and Droop attributes refined in design sessions - Refined OCC, Local (CME) and Global (PGPE) content - Additional attributes to structure updates - Moved freqeuncy bias attributes from "EXT" to applying to both external (Global) and internal (Local) computations (eg remove EXT_ from the name) - Add resonant clocking attributes - Add iVRM attributes and content to p9_pstates.h and INT biasing attributes to XML - Add generated Pstate output structure - Moved ATTR_DPLL_DIVIDER to p9_pm_hwp_attributes.xml as it is written with default vs relying on platform from necessarily providing it.. - Change ATTR_DPLL_DIVIDER default access to check for 0 value to then set default value - Added temporaty HB attributes - Added ATTR_VDM_ENABLE plus rebase - Deal with HB CI warnings - Rebase Change-Id: I435bcbbbba0006718211341322d26c6d98bb7dec RTC: 153217 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24904 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24907 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/mrs00.C')
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