summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/lib
diff options
context:
space:
mode:
authorGreg Still <stillgs@us.ibm.com>2017-05-19 16:59:08 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-06-30 15:35:55 -0400
commitf0e3f6dfcbec36f0fdf631172f973209ff645bc1 (patch)
tree212d119c2a3170427215abeb7694927c5d347697 /src/import/chips/p9/procedures/hwp/lib
parent52ab376b96e517ce8c4aec160370488504bf9054 (diff)
downloadtalos-hostboot-f0e3f6dfcbec36f0fdf631172f973209ff645bc1.tar.gz
talos-hostboot-f0e3f6dfcbec36f0fdf631172f973209ff645bc1.zip
WOF: HWP support for advanced function enablement
- Moved to "system disabled" paradigm (eg functions are ON but default) - Moved p9_hcode_image_build to using HWP attributes from p9_pstate_parameter_block - Added Pstate Auto Start to p9_pm_pstate_gpe_init to support advanced functions in Cronus - Add p9_pstate_parameter_block_errors - Added error points for #V validity. One creates an information error log and disables WOF. Others disable Pstates. - Add error points for resonant clocking errors in p9_pstate_parameter_block - Refactoring - Subfunction API change for p9_setup_evid - Added wof header verification and tested the code - Corrected Jump value verification - Removed the check for 0 values of N_S and N_L - Address Gerrit comments on validation - Added verification for VFRT header and fixed vfrt header members - Rebase with VFRT fix (after merge) - Added some checks in iac vdn calculation part - IDDQ output formating updates - Fixed VDM and WOF disable checks Change-Id: I3e62e04c7873bb6bb7c8d96e1e91d72fb044d81e RTC: 173672 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40954 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41096 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/lib')
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h135
-rw-r--r--src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h11
2 files changed, 73 insertions, 73 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
index 29a3333d6..8674d2d52 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
@@ -55,45 +55,45 @@ typedef union occ_flags
struct
{
#ifdef _BIG_ENDIAN
- uint32_t pgpe_StartNonStop : 1;
- uint32_t pgpe_PStateProtocolActivate : 1;
- uint32_t pgpe_PStateSafeMode : 1;
- uint32_t pm_ComplexSuspend : 1;
- uint32_t reserved1 : 4;
- uint32_t sgpe_Active : 1;
- uint32_t sgpe_IgnoreStopExits : 1;
- uint32_t sgpe_IgnoreStopEntry : 1;
- uint32_t sgpe_StopExitsIgnored : 1;
- uint32_t sgpe_StopEntryIgnored : 1;
- uint32_t reserved2 : 1;
- uint32_t sgpe_Aux_Activate : 1;
- uint32_t sgpe_Aux_Active : 1;
- uint32_t pib_I2CMasterEngine1Lock : 2;
- uint32_t pib_I2CMasterEngine2Lock : 2;
- uint32_t pib_I2CMasterEngine3Lock : 2;
- uint32_t undefined : 8;
- uint32_t requested_ActiveQuadUpdate : 1;
- uint32_t requested_OccSafeState : 1;
+ uint32_t pgpe_StartNonStop : 1;
+ uint32_t pgpe_PStateProtocolAutoActivate : 1;
+ uint32_t pgpe_PStateSafeMode : 1;
+ uint32_t pm_ComplexSuspend : 1;
+ uint32_t reserved1 : 4;
+ uint32_t sgpe_Active : 1;
+ uint32_t sgpe_IgnoreStopExits : 1;
+ uint32_t sgpe_IgnoreStopEntry : 1;
+ uint32_t sgpe_StopExitsIgnored : 1;
+ uint32_t sgpe_StopEntryIgnored : 1;
+ uint32_t reserved2 : 1;
+ uint32_t sgpe_Aux_Activate : 1;
+ uint32_t sgpe_Aux_Active : 1;
+ uint32_t pib_I2CMasterEngine1Lock : 2;
+ uint32_t pib_I2CMasterEngine2Lock : 2;
+ uint32_t pib_I2CMasterEngine3Lock : 2;
+ uint32_t undefined : 8;
+ uint32_t requested_ActiveQuadUpdate : 1;
+ uint32_t requested_OccSafeState : 1;
#else
- uint32_t requested_OccSafeState : 1;
- uint32_t requested_ActiveQuadUpdate : 1;
- uint32_t undefined : 8;
- uint32_t pib_I2CMasterEngine3Lock : 2;
- uint32_t pib_I2CMasterEngine2Lock : 2;
- uint32_t pib_I2CMasterEngine1Lock : 2;
- uint32_t sgpe_Aux_Active : 1;
- uint32_t sgpe_Aux_Activate : 1;
- uint32_t reserved2 : 1;
- uint32_t sgpe_StopEntryIgnored : 1;
- uint32_t sgpe_StopExitsIgnored : 1;
- uint32_t sgpe_IgnoreStopEntry : 1;
- uint32_t sgpe_IgnoreStopExits : 1;
- uint32_t sgpe_Active : 1;
- uint32_t reserved1 : 4;
- uint32_t pm_ComplexSuspend : 1;
- uint32_t pgpe_PStateSafeMode : 1;
- uint32_t pgpe_PStateProtocolActivate : 1;
- uint32_t pgpe_StartNonStop : 1;
+ uint32_t requested_OccSafeState : 1;
+ uint32_t requested_ActiveQuadUpdate : 1;
+ uint32_t undefined : 8;
+ uint32_t pib_I2CMasterEngine3Lock : 2;
+ uint32_t pib_I2CMasterEngine2Lock : 2;
+ uint32_t pib_I2CMasterEngine1Lock : 2;
+ uint32_t sgpe_Aux_Active : 1;
+ uint32_t sgpe_Aux_Activate : 1;
+ uint32_t reserved2 : 1;
+ uint32_t sgpe_StopEntryIgnored : 1;
+ uint32_t sgpe_StopExitsIgnored : 1;
+ uint32_t sgpe_IgnoreStopEntry : 1;
+ uint32_t sgpe_IgnoreStopExits : 1;
+ uint32_t sgpe_Active : 1;
+ uint32_t reserved1 : 4;
+ uint32_t pm_ComplexSuspend : 1;
+ uint32_t pgpe_PStateSafeMode : 1;
+ uint32_t pgpe_PStateProtocolAutoActivate : 1;
+ uint32_t pgpe_StartNonStop : 1;
#endif // _BIG_ENDIAN
} fields;
} occ_flags_t;
@@ -104,35 +104,35 @@ typedef union pgpe_flags
struct
{
#ifdef _BIG_ENDIAN
- uint16_t resclk_enable : 1;
- uint16_t ivrm_enable : 1;
- uint16_t vdm_enable : 1;
- uint16_t wof_enable : 1;
- uint16_t dpll_dynamic_fmax_enable : 1;
- uint16_t dpll_dynamic_fmin_enable : 1;
- uint16_t dpll_droop_protect_enable : 1;
- uint16_t reserved7 : 1;
- uint16_t occ_ipc_immed_response : 1;
- uint16_t wof_ipc_immed_response : 1;
- uint16_t enable_fratio : 1;
- uint16_t enable_vratio : 1;
- uint16_t vratio_modifier : 1;
- uint16_t reserved_13_15 : 7;
+ uint16_t resclk_enable : 1;
+ uint16_t ivrm_enable : 1;
+ uint16_t vdm_enable : 1;
+ uint16_t wof_enable : 1;
+ uint16_t dpll_dynamic_fmax_enable : 1;
+ uint16_t dpll_dynamic_fmin_enable : 1;
+ uint16_t dpll_droop_protect_enable : 1;
+ uint16_t reserved7 : 1;
+ uint16_t occ_ipc_immed_response : 1;
+ uint16_t wof_ipc_immed_response : 1;
+ uint16_t enable_fratio : 1;
+ uint16_t enable_vratio : 1;
+ uint16_t vratio_modifier : 1;
+ uint16_t reserved_13_15 : 7;
#else
- uint16_t reserved_13_15 : 7;
- uint16_t vratio_modifier : 1;
- uint16_t enable_vratio : 1;
- uint16_t enable_fratio : 1;
- uint16_t wof_ipc_immed_response : 1;
- uint16_t occ_ipc_immed_response : 1;
- uint16_t reserved7 : 1;
- uint16_t dpll_droop_protect_enable : 1;
- uint16_t dpll_dynamic_fmin_enable : 1;
- uint16_t dpll_dynamic_fmax_enable : 1;
- uint16_t wof_enable : 1;
- uint16_t vdm_enable : 1;
- uint16_t ivrm_enable : 1;
- uint16_t resclk_enable : 1;
+ uint16_t reserved_13_15 : 7;
+ uint16_t vratio_modifier : 1;
+ uint16_t enable_vratio : 1;
+ uint16_t enable_fratio : 1;
+ uint16_t wof_ipc_immed_response : 1;
+ uint16_t occ_ipc_immed_response : 1;
+ uint16_t reserved7 : 1;
+ uint16_t dpll_droop_protect_enable : 1;
+ uint16_t dpll_dynamic_fmin_enable : 1;
+ uint16_t dpll_dynamic_fmax_enable : 1;
+ uint16_t wof_enable : 1;
+ uint16_t vdm_enable : 1;
+ uint16_t ivrm_enable : 1;
+ uint16_t resclk_enable : 1;
#endif
} fields;
} pgpe_flags_t;
@@ -147,7 +147,8 @@ namespace p9hcd
enum PM_GPE_OCCFLG_DEFS
{
PGPE_START_NOT_STOP = 0,
- PGPE_PSTATE_PROTOCOL_ACTIVATE = 1,
+ PGPE_PSTATE_PROTOCOL_AUTO_ACTIVATE = 1,
+ PGPE_PSTATE_PROTOCOL_ACTIVATE = 1, // @todo PGPE Hcode dependencies
PGPE_SAFE_MODE = 2,
PM_COMPLEX_SUSPEND = 3,
SGPE_ACTIVE = 8,
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
index b7efeb8cf..a806274ec 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
@@ -295,19 +295,18 @@ typedef struct __attribute__((packed)) VFRTHeaderLayout
// VFRT Magic code "VT"
uint16_t magic_number;
- uint16_t reserved_1;
+ uint16_t reserved;
// 0:System type, 1:Homer type (0:3)
// if version 1: VFRT size is 12 row(voltage) X 11 column(freq) of size uint8_t
// (4:7)
// if version 2: VFRT size is 24 row(Voltage) X 5 column (Freq) of size uint8_t
uint8_t type_version;
- //Reserved
- uint8_t reserved_2;
- //Identifies the Vdn assumptions tht went in this VFRT (4:7)
+ //Identifies the Vdn assumptions tht went in this VFRT (0:7)
uint8_t res_vdnId;
- //Identifies the Vdd assumptions tht went in this VFRT (0:4)
- //Identifies the Quad Active assumptions tht went in this VFRT (5:7)
+ //Identifies the Vdd assumptions tht went in this VFRT (0:7)
uint8_t VddId_QAId;
+ //Identifies the Quad Active assumptions tht went in this VFRT (5:7)
+ uint8_t rsvd_QAId;
} VFRTHeaderLayout_t;// WOF Tables Header
typedef struct __attribute__((packed, aligned(128))) WofTablesHeader
OpenPOWER on IntegriCloud