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author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2017-05-02 13:12:59 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-06-01 06:44:20 -0400 |
commit | 2309514197db436f8bb6bd0615834c3611c9f89b (patch) | |
tree | b319ea474c5e108a99a34388949dc7cbf2e261ac /src/import/chips/p9/procedures/hwp/lib | |
parent | 7b062f2d2684bbe5e84ffd529d7a789380238405 (diff) | |
download | talos-hostboot-2309514197db436f8bb6bd0615834c3611c9f89b.tar.gz talos-hostboot-2309514197db436f8bb6bd0615834c3611c9f89b.zip |
p9_pstate_parameter_block: Pound W enhancement for VID Compare
- Add changes to Compare VID slopes support
- Added changes for threshold slopes
Change-Id: I6ce9f7630cf8f8bbb19a2914da43c24308c3c7fd
RTC:172523
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39955
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: CHRISTOPHER M. RIEDL <cmriedl@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39961
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/lib')
5 files changed, 70 insertions, 52 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstate_parameter_block.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstate_parameter_block.h index 185270126..13f2b2bee 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_pstate_parameter_block.h +++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstate_parameter_block.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016 */ +/* Contributors Listed Below - COPYRIGHT 2016,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -143,7 +143,7 @@ typedef struct IVRM_PARM_DATA //Section added back by ssrivath // START OF PARMS REQUIRED VPD parsing procedures -//#define S132A_POINTS 4 - Replaced by VPD_PV_POINTS +//#define S132A_POINTS 4 - Replaced by NUM_OP_POINTS #define PSTATE_STEPSIZE 1 #define EVRM_DELAY_NS 100 #define DEAD_ZONE_5MV 20 // 100mV @@ -399,8 +399,8 @@ load_wof_attributes ( PstateSuperStructure* pss, /// ------------------------------------------------------------ /// @brief Copy VPD operating point into destination in assending order -/// @param[in] &src[VPD_PV_POINTS] => reference to source VPD structure (array) -/// @param[out] *dest[VPD_PV_POINTS] => pointer to destination VpdOperatingPoint structure +/// @param[in] &src[NUM_OP_POINTS] => reference to source VPD structure (array) +/// @param[out] *dest[NUM_OP_POINTS] => pointer to destination VpdOperatingPoint structure /// @return FAPI2::SUCCESS /// ------------------------------------------------------------ diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h index 2b162e417..274ad92de 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h +++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_cmeqm.h @@ -168,11 +168,12 @@ typedef struct { uint16_t ivdd_tdp_ac_current_10ma; uint16_t ivdd_tdp_dc_current_10ma; - uint8_t vdm_overvold_small_thresholds; + uint8_t vdm_overvolt_small_thresholds; uint8_t vdm_large_extreme_thresholds; - uint8_t vdm_small_frequency_drop; - uint8_t vdm_large_frequency_drop; - uint16_t vdm_spare; + uint8_t vdm_small_large_normal_freq; + uint8_t vdm_large_small_normal_freq; + uint8_t vdm_vid_compare_ivid; + uint8_t vdm_spare; } poundw_entry_t; typedef struct @@ -186,45 +187,18 @@ typedef struct typedef struct { - poundw_entry_t poundw_nominal; - poundw_entry_t poundw_powersave; - poundw_entry_t poundw_turbo; - poundw_entry_t poundw_ultraturbo; + poundw_entry_t poundw[NUM_OP_POINTS]; resistance_entry_t resistance_data; uint64_t reserved1; uint16_t reserved2; } PoundW_data; + /// VDM/Droop Parameter Block /// typedef struct { - uint8_t vid_compare_override_mv_enable; - uint8_t vid_compare_override_mv[VPD_PV_POINTS]; - uint8_t vdm_response; - - // For the following *_enable fields, bits are defined to indicate - // which of the respective *override* array entries are valid. - // bit 0: UltraTurbo; bit 1: Turbo; bit 2: Nominal; bit 3: PowSave - uint8_t droop_small_override_enable; - uint8_t droop_large_override_enable; - uint8_t droop_extreme_override_enable; - uint8_t overvolt_override_enable; - uint8_t fmin_override_khz_enable; - uint8_t fmax_override_khz_enable; - - // The respecitve *_enable above indicate which index values are valid - uint8_t droop_small_override[VPD_PV_POINTS]; - uint8_t droop_large_override[VPD_PV_POINTS]; - uint8_t droop_extreme_override[VPD_PV_POINTS]; - uint8_t overvolt_override[VPD_PV_POINTS]; - uint8_t fmin_override_khz[VPD_PV_POINTS]; - uint8_t fmax_override_khz[VPD_PV_POINTS]; - - /// Pad structure to 8-byte alignment - /// @todo pad once fully structure is complete. - // uint8_t pad[1]; - -} VDMParmBlock; + PoundW_data vpd_w_data; +} LP_VDMParmBlock; /// The layout of the data created by the Pstate table creation firmware for @@ -278,6 +252,7 @@ typedef struct iVRMInfo } IvrmParmBlock; +typedef uint8_t CompareVIDPoints; /// The layout of the data created by the Pstate table creation firmware for /// comsumption by the CME Quad Manager. This data will reside in the Core @@ -297,7 +272,7 @@ typedef struct /// VPD operating points are stored without load-line correction. Frequencies /// are in MHz, voltages are specified in units of 5mV, and currents are /// in units of 500mA. - VpdOperatingPoint operating_points[VPD_PV_POINTS]; + VpdOperatingPoint operating_points[NUM_OP_POINTS]; /// Loadlines and Distribution values for the VDD rail SysPowerDistParms vdd_sysparm; @@ -308,7 +283,7 @@ typedef struct /// in setting the external voltages. This is used to recompute the Vin voltage /// based on the Global Actual Pstate . /// Values in 0.5% - VpdBias ext_biases[VPD_PV_POINTS]; + VpdBias ext_biases[NUM_OP_POINTS]; /// Internal Biases /// @@ -316,7 +291,7 @@ typedef struct /// in setting the internal voltages (eg Vout to the iVRMs) as part of the /// Local Actual Pstate. /// Values in 0.5% - VpdBias int_biases[VPD_PV_POINTS]; + VpdBias int_biases[NUM_OP_POINTS]; /// IVRM Data IvrmParmBlock ivrm; @@ -325,11 +300,23 @@ typedef struct ResonantClockingSetup resclk; /// VDM Data - VDMParmBlock vdm; + LP_VDMParmBlock vdm; /// DPLL pstate 0 value uint32_t dpll_pstate0_value; + // Biased Compare VID operating points + CompareVIDPoints vid_point_set[NUM_OP_POINTS]; + + // Biased Threshold operation points + int8_t threshold_set[NUM_OP_POINTS][NUM_THRESHOLD_POINTS]; + + //pstate-volt compare slopes + uint16_t PsVIDCompSlopes[VPD_NUM_SLOPES_REGION]; + + //pstate-volt threshold slopes + uint16_t PsVDMThreshSlopes[VPD_NUM_SLOPES_REGION][NUM_THRESHOLD_POINTS]; + } LocalPstateParmBlock; #ifdef __cplusplus diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h index a45f93fcc..9f7457e53 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h +++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h @@ -90,15 +90,17 @@ // are warrented /// VPD #V Data from keyword (eg VPD order) -#define VPD_PV_POINTS 4 +#define NUM_OP_POINTS 4 +#define NUM_THRESHOLD_POINTS 4 #define VPD_PV_POWERSAVE 1 #define VPD_PV_NOMINAL 0 #define VPD_PV_TURBO 2 #define VPD_PV_ULTRA 3 #define VPD_PV_ORDER {VPD_PV_POWERSAVE, VPD_PV_NOMINAL, VPD_PV_TURBO, VPD_PV_ULTRA} #define VPD_PV_ORDER_STR {"Nominal ","PowerSave ", "Turbo ", "UltraTurbo"} +#define VPD_THRESHOLD_ORDER_STR {"Overvolt", "Small", "Large", "Extreme" } -/// VPD #V Operating Points (eg Natureal order) +/// VPD #V Operating Points (eg Natural order) #define POWERSAVE 0 #define NOMINAL 1 #define TURBO 2 @@ -133,7 +135,12 @@ #define VPD_PT_SET_ORDER {VPD_PT_SET_RAW, VPD_PT_SET_SYSP, VPD_PT_SET_BIASED, VPD_PT_SET_BIASED_SYSP} #define VPD_PT_SET_ORDER_STR {"Raw ", "SysParam ","Biased ", "Biased/SysParam"} -#define EVID_SLOPE_FP_SHIFT 13 +#define VID_SLOPE_FP_SHIFT 13 +#define THRESH_SLOPE_FP_SHIFT 12 + +// 0 = PowerSave, 1 = Nominal; 2 = Turbo; 3 = UltraTurbo; 4 = Enable +#define VDM_DROOP_OP_POINTS 5 + /// IDDQ readings, diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h index acae42877..8f3f41556 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h +++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_occ.h @@ -167,7 +167,7 @@ typedef struct /// VPD operating points are stored without load-line correction. Frequencies /// are in MHz, voltages are specified in units of 5mV, and currents are /// in units of 500mA. - VpdOperatingPoint operating_points[VPD_PV_POINTS]; + VpdOperatingPoint operating_points[NUM_OP_POINTS]; /// Loadlines and Distribution values for the VDD rail SysPowerDistParms vdd_sysparm; diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h index a089611cb..3c7752630 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h +++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h @@ -120,6 +120,30 @@ typedef struct } WOFElements; +/// VDM/Droop Parameter Block +/// +typedef struct +{ + uint8_t vid_compare_override_mv[VDM_DROOP_OP_POINTS]; + uint8_t vdm_response; + + // For the following *_enable fields, bits are defined to indicate + // which of the respective *override* array entries are valid. + // bit 0: UltraTurbo; bit 1: Turbo; bit 2: Nominal; bit 3: PowSave + + // The respecitve *_enable above indicate which index values are valid + uint8_t droop_small_override[VDM_DROOP_OP_POINTS]; + uint8_t droop_large_override[VDM_DROOP_OP_POINTS]; + uint8_t droop_extreme_override[VDM_DROOP_OP_POINTS]; + uint8_t overvolt_override[VDM_DROOP_OP_POINTS]; + uint16_t fmin_override_khz[VDM_DROOP_OP_POINTS]; + uint16_t fmax_override_khz[VDM_DROOP_OP_POINTS]; + + /// Pad structure to 8-byte alignment + /// @todo pad once fully structure is complete. + // uint8_t pad[1]; + +} GP_VDMParmBlock; /// Global Pstate Parameter Block /// @@ -162,14 +186,14 @@ typedef struct /// VPD operating points are stored without load-line correction. Frequencies /// are in MHz, voltages are specified in units of 5mV, and currents are /// in units of 500mA. - VpdOperatingPoint operating_points[VPD_PV_POINTS]; + VpdOperatingPoint operating_points[NUM_OP_POINTS]; /// Biases /// /// Biases applied to the VPD operating points prior to load-line correction /// in setting the external voltages. /// Values in 0.5% - VpdBias ext_biases[VPD_PV_POINTS]; + VpdBias ext_biases[NUM_OP_POINTS]; /// Loadlines and Distribution values for the VDD rail SysPowerDistParms vdd_sysparm; @@ -199,7 +223,7 @@ typedef struct uint8_t vrm_stepdelay_value; /// VDM Data - VDMParmBlock vdm; + GP_VDMParmBlock vdm; /// The following are needed to generated the Pstate Table to HOMER. @@ -209,7 +233,7 @@ typedef struct /// in setting the internal voltages (eg Vout to the iVRMs) as part of the /// Local Actual Pstate. /// Values in 0.5% - VpdBias int_biases[VPD_PV_POINTS]; + VpdBias int_biases[NUM_OP_POINTS]; /// IVRM Data IvrmParmBlock ivrm; @@ -242,7 +266,7 @@ typedef struct uint16_t VPsSlopes[VPD_NUM_SLOPES_SET][VPD_NUM_SLOPES_REGION]; /// All operating points - VpdOperatingPoint operating_points_set[NUM_VPD_PTS_SET][VPD_PV_POINTS]; + VpdOperatingPoint operating_points_set[NUM_VPD_PTS_SET][NUM_OP_POINTS]; //DPLL pstate 0 value uint32_t dpll_pstate0_value; |