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| author | Yue Du <daviddu@us.ibm.com> | 2017-08-31 12:29:56 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-07 13:30:57 -0400 |
| commit | 1f451778d58bbe2b2f7f506aaeb1ec78976f607e (patch) | |
| tree | eadef7b3e027d8bba56edf5b34e34b24170190a9 /src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h | |
| parent | 9b41cf040b1b0641a46d80733a61acaa82ca7bcf (diff) | |
| download | talos-hostboot-1f451778d58bbe2b2f7f506aaeb1ec78976f607e.tar.gz talos-hostboot-1f451778d58bbe2b2f7f506aaeb1ec78976f607e.zip | |
PM: Add atrribute to cpmmr control for Core Periodic Quiesce
Change-Id: I70cc9bba5e358a85ee420b329365817c688084f0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45505
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45510
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h index a6ac01076..eb1745b96 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h +++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h @@ -241,6 +241,16 @@ enum PM_PGPE_HEADER_FLAGS PGPE_HEADER_FLAGS_VRATIO_MODIFIER = 12 }; +// +//Enum for of PPM Register Bits for FW Usage +// +enum PM_PPM_FW_FLAGS +{ + CPPM_CPMMR_DISABLE_PERIODIC_CORE_QUIESCE = 2, + QPPM_QCCR_IGNORE_QUAD_STOP_EXITS = 10, + QPPM_QCCR_IGNORE_QUAD_STOP_ENTRIES = 11 +}; + #ifndef __PPE_PLAT } //End p9hcd namespace #endif |
