summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/hwp/initfiles
diff options
context:
space:
mode:
authorJenny Huynh <jhuynh@us.ibm.com>2018-08-07 14:45:37 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-08-23 09:19:49 -0500
commit34d3b9353e228c9b9ff73c8c7e84873c251c06e2 (patch)
tree9b8c39738b284d27a6f95684b6ee1221a70107be /src/import/chips/p9/procedures/hwp/initfiles
parent47c5001b587c4117dcfe51d1af860bc1128c4c1e (diff)
downloadtalos-hostboot-34d3b9353e228c9b9ff73c8c7e84873c251c06e2.tar.gz
talos-hostboot-34d3b9353e228c9b9ff73c8c7e84873c251c06e2.zip
Avoid enabling smf bits in nmmu logic for P9
No secure accelerators in P9, so avoid enabling nmmu smf bits that will otherwise cause sm table walk hangs. Nmmu will gate off addr15 when mm_cfg_xlat_ctl_urmor(0:2)=0b000. Change-Id: Ib008d6be5d32f45ebb2b66600e45828decf6fbf4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64064 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Emmanuel Sacristan <esacris@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64071 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles')
-rw-r--r--src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C17
1 files changed, 0 insertions, 17 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C
index 58373c5cb..b67ed43fc 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C
@@ -44,7 +44,6 @@ constexpr uint64_t literal_0x000000000000 = 0x000000000000;
constexpr uint64_t literal_0x910000040F00 = 0x910000040F00;
constexpr uint64_t literal_0x911100000F00 = 0x911100000F00;
constexpr uint64_t literal_0x991100000F00 = 0x991100000F00;
-constexpr uint64_t literal_0b110 = 0b110;
constexpr uint64_t literal_0b11111 = 0b11111;
constexpr uint64_t literal_0x00E = 0x00E;
constexpr uint64_t literal_0x000 = 0x000;
@@ -64,8 +63,6 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW414700, TGT0, l_TGT0_ATTR_CHIP_EC_FEATURE_HW414700));
fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE));
- fapi2::ATTR_SMF_CONFIG_Type l_TGT1_ATTR_SMF_CONFIG;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SMF_CONFIG, TGT1, l_TGT1_ATTR_SMF_CONFIG));
fapi2::buffer<uint64_t> l_scom_buffer;
{
FAPI_TRY(fapi2::getScom( TGT0, 0x5012c03ull, l_scom_buffer ));
@@ -209,20 +206,6 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
FAPI_TRY(fapi2::putScom(TGT0, 0x5012c47ull, l_scom_buffer));
}
{
- if (((l_chip_id == 0x5) && (l_chip_ec == 0x22)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x23)) || ((l_chip_id == 0x6)
- && (l_chip_ec == 0x12)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x13)) || ((l_chip_id == 0x7) && (l_chip_ec == 0x10)) )
- {
- FAPI_TRY(fapi2::getScom( TGT0, 0x5012c4cull, l_scom_buffer ));
-
- if ((l_TGT1_ATTR_SMF_CONFIG == fapi2::ENUM_ATTR_SMF_CONFIG_ENABLED))
- {
- l_scom_buffer.insert<0, 3, 61, uint64_t>(literal_0b110 );
- }
-
- FAPI_TRY(fapi2::putScom(TGT0, 0x5012c4cull, l_scom_buffer));
- }
- }
- {
FAPI_TRY(fapi2::getScom( TGT0, 0x5012c52ull, l_scom_buffer ));
l_scom_buffer.insert<30, 1, 59, uint64_t>(literal_0b11111 );
OpenPOWER on IntegriCloud