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| author | Jenny Huynh <jhuynh@us.ibm.com> | 2019-06-24 19:26:30 -0400 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-06-28 09:33:50 -0500 |
| commit | 0ad5976c1f8b1c41cb962e9234aea3fc0b02a7bf (patch) | |
| tree | a0ac0142c4b71f98baa95305c27c11079a9e6ac1 /src/import/chips/p9/procedures/hwp/initfiles | |
| parent | a4c72a5f2da81540b4d8309bac3413548aadd6e0 (diff) | |
| download | talos-hostboot-0ad5976c1f8b1c41cb962e9234aea3fc0b02a7bf.tar.gz talos-hostboot-0ad5976c1f8b1c41cb962e9234aea3fc0b02a7bf.zip | |
Fix Axone SMF lower address mapping and enable chip addr extension mask in mcu
Change-Id: I656e67c48fc63e7308ce397882dca3f962c069a3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79421
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Adam S Hale <adam.samuel.hale@ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79424
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C index 20b65bd74..f0ee6b4e5 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9a_mi_scom.C @@ -44,6 +44,10 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM_Type l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM, TGT1, l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM)); uint64_t l_def_ENABLE_AMO_CACHING = literal_1; + fapi2::ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID_Type l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID, TGT1, l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID)); + fapi2::ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID_Type l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID, TGT1, l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID)); uint64_t l_def_ENABLE_MCU_TIMEOUTS = literal_1; fapi2::buffer<uint64_t> l_scom_buffer; { @@ -101,6 +105,8 @@ fapi2::ReturnCode p9a_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, l_scom_buffer.insert<24, 16, 48, uint64_t>(literal_0b0000000000001000 ); } + l_scom_buffer.insert<46, 4, 60, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_GROUP_ID ); + l_scom_buffer.insert<50, 3, 61, uint64_t>(l_TGT1_ATTR_FABRIC_ADDR_EXTENSION_CHIP_ID ); FAPI_TRY(fapi2::putScom(TGT0, 0x5010813ull, l_scom_buffer)); } { |
