Fix DMI SCOM MCMODE0 issue.

Change-Id: Ia320b8765f5915c692956d50526bd538f257e8d1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46046
Dev-Ready: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46086
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

1 files changed, 68 insertions, 3 deletions

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C
index a86f64a49..a9c7992bd 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C
@@ -35,16 +35,37 @@ constexpr uint64_t literal_8 = 8;
 constexpr uint64_t literal_1 = 1;
 constexpr uint64_t literal_0x19 = 0x19;
 constexpr uint64_t literal_0 = 0;
+constexpr uint64_t literal_1167 = 1167;
+constexpr uint64_t literal_1000 = 1000;
+constexpr uint64_t literal_1273 = 1273;
+constexpr uint64_t literal_1200 = 1200;
+constexpr uint64_t literal_1400 = 1400;
+constexpr uint64_t literal_1500 = 1500;
 constexpr uint64_t literal_0b0000000000001000000 = 0b0000000000001000000;
 constexpr uint64_t literal_0b0000000000001000 = 0b0000000000001000;
 constexpr uint64_t literal_0b01 = 0b01;
 constexpr uint64_t literal_5 = 5;
 
 fapi2::ReturnCode p9c_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0,
-                              const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1)
+                              const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>& TGT1, const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT2)
 {
     {
+        fapi2::ATTR_EC_Type   l_chip_ec;
+        fapi2::ATTR_NAME_Type l_chip_id;
+        FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_NAME, TGT2, l_chip_id));
+        FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT2, l_chip_ec));
         uint64_t l_def_ENABLE_PREFETCH_DROP_PROMOTE_BASIC = literal_1;
+        fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC_Type l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC, TGT2,
+                               l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC));
+        fapi2::ATTR_MC_SYNC_MODE_Type l_TGT2_ATTR_MC_SYNC_MODE;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_MC_SYNC_MODE, TGT2, l_TGT2_ATTR_MC_SYNC_MODE));
+        fapi2::ATTR_FREQ_PB_MHZ_Type l_TGT1_ATTR_FREQ_PB_MHZ;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_PB_MHZ, TGT1, l_TGT1_ATTR_FREQ_PB_MHZ));
+        fapi2::ATTR_FREQ_MCA_MHZ_Type l_TGT1_ATTR_FREQ_MCA_MHZ;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_MCA_MHZ, TGT1, l_TGT1_ATTR_FREQ_MCA_MHZ));
+        uint64_t l_def_MCA_FREQ = l_TGT1_ATTR_FREQ_MCA_MHZ;
+        uint64_t l_def_MN_FREQ_RATIO = ((literal_1000 * l_def_MCA_FREQ) / l_TGT1_ATTR_FREQ_PB_MHZ);
         uint64_t l_def_ENABLE_DYNAMIC_64_128B_READS = literal_0;
         uint64_t l_def_ENABLE_ECRESP = literal_1;
         uint64_t l_def_ENABLE_AMO_CACHING = literal_1;
@@ -73,6 +94,46 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0,
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x5010811ull, l_scom_buffer ));
 
+            if (((l_TGT2_ATTR_MC_SYNC_MODE == literal_1) && (l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC == literal_0)))
+            {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON = 0x1;
+                l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON );
+            }
+            else if (((l_TGT2_ATTR_MC_SYNC_MODE == literal_1) && (l_TGT2_ATTR_CHIP_EC_FEATURE_HW413362_P9UDD11_ASYNC == literal_1)))
+            {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0;
+                l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF );
+            }
+            else if (((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO < literal_1167)))
+            {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0;
+                l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF );
+            }
+            else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1200))
+                      && (l_def_MN_FREQ_RATIO < literal_1273)))
+            {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0;
+                l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF );
+            }
+            else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1167))
+                      && (l_def_MN_FREQ_RATIO < literal_1200)))
+            {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0;
+                l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF );
+            }
+            else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1273))
+                      && (l_def_MN_FREQ_RATIO < literal_1400)))
+            {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0;
+                l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF );
+            }
+            else if ((((l_TGT2_ATTR_MC_SYNC_MODE == literal_0) && (l_def_MN_FREQ_RATIO >= literal_1400))
+                      && (l_def_MN_FREQ_RATIO < literal_1500)))
+            {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF = 0x0;
+                l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_OFF );
+            }
+
             constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_DISABLE_MC_SYNC_ON = 0x1;
             l_scom_buffer.insert<27, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_DISABLE_MC_SYNC_ON );
             constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_DISABLE_MC_PAIR_SYNC_ON = 0x1;
@@ -103,8 +164,6 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0,
                 l_scom_buffer.insert<7, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_CENTAURP_ENABLE_ECRESP_ON );
             }
 
-            constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON = 0x1;
-            l_scom_buffer.insert<6, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ASYNC_MODE_ON );
             FAPI_TRY(fapi2::putScom(TGT0, 0x5010811ull, l_scom_buffer));
         }
         {
@@ -137,6 +196,12 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0,
 
             if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1))
             {
+                constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_DISABLE_HARDWARE_TRACE_MANAGER_HANG_ON = 0x1;
+                l_scom_buffer.insert<36, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_DISABLE_HARDWARE_TRACE_MANAGER_HANG_ON );
+            }
+
+            if ((l_def_ENABLE_MCU_TIMEOUTS == literal_1))
+            {
                 constexpr auto l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_NONMIRROR_HANG_ON = 0x1;
                 l_scom_buffer.insert<32, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCTO_ENABLE_NONMIRROR_HANG_ON );
             }