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author | Joe McGill <jmcgill@us.ibm.com> | 2018-03-19 17:02:23 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-04-03 13:47:21 -0400 |
commit | 523de826a22e4abbf1f3cbbd026939503b2ac307 (patch) | |
tree | 68a4483bf6fff8d8693dc1825a5c87972b9927ea /src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C | |
parent | c6150efe43c8fb1654eeba23b0aa590a8e02c1eb (diff) | |
download | talos-hostboot-523de826a22e4abbf1f3cbbd026939503b2ac307.tar.gz talos-hostboot-523de826a22e4abbf1f3cbbd026939503b2ac307.zip |
configure Cumulus MC inband logic to pass host/occ bit under BAR
In p9 mode, MCMODE0 bit 25 controls the extent of the inband BAR match:
- bit 25 = 0b0 -- BAR match down to RA bit 38
- bit 25 = 0b1 -- BAR match down to RA bit 37, bit 38 passed to Centaur
indicating host or OCC access
In p8, we used the host/OCC bit to indicate the requestor. Current
OCC code is continuing this behavior, so we need to set MCMODE0 bit 25
to allow this.
Change-Id: I740549d61b9485e66d8a201ce9b80c241c9f2a85
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56044
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56046
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C index 77019842a..24d504147 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C @@ -205,6 +205,8 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, l_scom_buffer.insert<22, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ENABLE_CENTAUR_CHECKSTOP_COMMAND_ON ); constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ENABLE_CENTAUR_TRACESTOP_COMMAND_ON = 0x1; l_scom_buffer.insert<23, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ENABLE_CENTAUR_TRACESTOP_COMMAND_ON ); + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE0_ENABLE_SELECT_ERROR_LOG_SOURCE_ON = 0x1; + l_scom_buffer.insert<25, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE0_ENABLE_SELECT_ERROR_LOG_SOURCE_ON ); if ((l_def_ENABLE_DYNAMIC_64_128B_READS == literal_1)) { |