diff options
| author | Lennard Streat <lstreat@us.ibm.com> | 2018-02-09 15:36:18 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-02-18 13:08:51 -0500 |
| commit | 2839599b33738cd903da43cbcf37cffcb3b4f28e (patch) | |
| tree | f5cf5ae95836a808915e99fc1ff026b73576a364 /src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C | |
| parent | 80fa020e3ea7439946794a43188dc74ff6e02899 (diff) | |
| download | talos-hostboot-2839599b33738cd903da43cbcf37cffcb3b4f28e.tar.gz talos-hostboot-2839599b33738cd903da43cbcf37cffcb3b4f28e.zip | |
Protect Firmware from exposure to HW423533
Change-Id: Iaf1a83505ed9bdd9e79bfc46157856263c392736
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53783
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: LENNARD G. STREAT <lstreat@us.ibm.com>
Reviewed-by: SHELTON LEUNG <sleung@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53801
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C index e3bc3c56a..77019842a 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9c_mi_scom.C @@ -74,6 +74,9 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, uint64_t l_def_ENABLE_DYNAMIC_64_128B_READS = literal_0; fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM_Type l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM; FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_ENABLE_MEM_EARLY_DATA_SCOM, TGT1, l_TGT1_ATTR_ENABLE_MEM_EARLY_DATA_SCOM)); + fapi2::ATTR_CHIP_EC_FEATURE_HW423533_P9UDD11_MDI_Type l_TGT2_ATTR_CHIP_EC_FEATURE_HW423533_P9UDD11_MDI; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW423533_P9UDD11_MDI, TGT2, + l_TGT2_ATTR_CHIP_EC_FEATURE_HW423533_P9UDD11_MDI)); uint64_t l_def_ENABLE_AMO_CACHING = literal_1; uint64_t l_def_ENABLE_HWFM = literal_1; uint64_t l_def_ENABLE_MCU_TIMEOUTS = literal_1; @@ -236,6 +239,12 @@ fapi2::ReturnCode p9c_mi_scom(const fapi2::Target<fapi2::TARGET_TYPE_MI>& TGT0, { FAPI_TRY(fapi2::getScom( TGT0, 0x5010813ull, l_scom_buffer )); + if ((l_TGT2_ATTR_CHIP_EC_FEATURE_HW423533_P9UDD11_MDI == literal_0)) + { + constexpr auto l_MC01_PBI01_SCOMFIR_MCMODE2_FORCE_SFSTAT_ACTIVE_ON = 0x1; + l_scom_buffer.insert<0, 1, 63, uint64_t>(l_MC01_PBI01_SCOMFIR_MCMODE2_FORCE_SFSTAT_ACTIVE_ON ); + } + if ((l_def_ENABLE_AMO_CACHING == literal_1)) { l_scom_buffer.insert<24, 16, 48, uint64_t>(literal_0b0000000000001000 ); |
