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| author | Chris Hanudel <chanudel@us.ibm.com> | 2017-05-31 16:29:14 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-11 13:10:59 -0400 |
| commit | e96d23175835b9df487ee24b6fd32b1fe257cf4e (patch) | |
| tree | 3203a4db9581fbf1dabf1cf107426bb3f185d28f /src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C | |
| parent | 2a804602af153d43f11fb63e5e7dad264c5a1e33 (diff) | |
| download | talos-hostboot-e96d23175835b9df487ee24b6fd32b1fe257cf4e.tar.gz talos-hostboot-e96d23175835b9df487ee24b6fd32b1fe257cf4e.zip | |
P9 NX Watchdog Timer Changes
Change-Id: I5241d4d3b1ce49956caa6e2081d2a3a9d42e275c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41273
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41276
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C index a87326d97..cfae24efb 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C @@ -105,30 +105,30 @@ fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& { FAPI_TRY(fapi2::getScom( TGT0, 0x201105cull, l_scom_buffer )); - constexpr auto l_NX_DMA_CH0_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<1, 4, 60, uint64_t>(l_NX_DMA_CH0_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); + constexpr auto l_NX_DMA_CH0_WATCHDOG_REF_DIV_DIVIDE_BY_512 = 0x9; + l_scom_buffer.insert<1, 4, 60, uint64_t>(l_NX_DMA_CH0_WATCHDOG_REF_DIV_DIVIDE_BY_512 ); constexpr auto l_NX_DMA_CH0_WATCHDOG_TIMER_ENBL_ON = 0x1; l_scom_buffer.insert<0, 1, 63, uint64_t>(l_NX_DMA_CH0_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH1_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<6, 4, 60, uint64_t>(l_NX_DMA_CH1_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); + constexpr auto l_NX_DMA_CH1_WATCHDOG_REF_DIV_DIVIDE_BY_512 = 0x9; + l_scom_buffer.insert<6, 4, 60, uint64_t>(l_NX_DMA_CH1_WATCHDOG_REF_DIV_DIVIDE_BY_512 ); constexpr auto l_NX_DMA_CH1_WATCHDOG_TIMER_ENBL_ON = 0x1; l_scom_buffer.insert<5, 1, 63, uint64_t>(l_NX_DMA_CH1_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH2_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<11, 4, 60, uint64_t>(l_NX_DMA_CH2_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); + constexpr auto l_NX_DMA_CH2_WATCHDOG_REF_DIV_DIVIDE_BY_512 = 0x9; + l_scom_buffer.insert<11, 4, 60, uint64_t>(l_NX_DMA_CH2_WATCHDOG_REF_DIV_DIVIDE_BY_512 ); constexpr auto l_NX_DMA_CH2_WATCHDOG_TIMER_ENBL_ON = 0x1; l_scom_buffer.insert<10, 1, 63, uint64_t>(l_NX_DMA_CH2_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH3_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<16, 4, 60, uint64_t>(l_NX_DMA_CH3_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); + constexpr auto l_NX_DMA_CH3_WATCHDOG_REF_DIV_DIVIDE_BY_512 = 0x9; + l_scom_buffer.insert<16, 4, 60, uint64_t>(l_NX_DMA_CH3_WATCHDOG_REF_DIV_DIVIDE_BY_512 ); constexpr auto l_NX_DMA_CH3_WATCHDOG_TIMER_ENBL_ON = 0x1; l_scom_buffer.insert<15, 1, 63, uint64_t>(l_NX_DMA_CH3_WATCHDOG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_CH4_WATCHDOG_REF_DIV_DIVIDE_BY_4 = 0x2; - l_scom_buffer.insert<21, 4, 60, uint64_t>(l_NX_DMA_CH4_WATCHDOG_REF_DIV_DIVIDE_BY_4 ); + constexpr auto l_NX_DMA_CH4_WATCHDOG_REF_DIV_DIVIDE_BY_512 = 0x9; + l_scom_buffer.insert<21, 4, 60, uint64_t>(l_NX_DMA_CH4_WATCHDOG_REF_DIV_DIVIDE_BY_512 ); constexpr auto l_NX_DMA_CH4_WATCHDOG_TIMER_ENBL_ON = 0x1; l_scom_buffer.insert<20, 1, 63, uint64_t>(l_NX_DMA_CH4_WATCHDOG_TIMER_ENBL_ON ); constexpr auto l_NX_DMA_DMA_HANG_TIMER_ENBL_ON = 0x1; l_scom_buffer.insert<25, 1, 63, uint64_t>(l_NX_DMA_DMA_HANG_TIMER_ENBL_ON ); - constexpr auto l_NX_DMA_DMA_HANG_TIMER_REF_DIV_DIVIDE_BY_32 = 0x3; - l_scom_buffer.insert<26, 4, 60, uint64_t>(l_NX_DMA_DMA_HANG_TIMER_REF_DIV_DIVIDE_BY_32 ); + constexpr auto l_NX_DMA_DMA_HANG_TIMER_REF_DIV_DIVIDE_BY_1024 = 0x8; + l_scom_buffer.insert<26, 4, 60, uint64_t>(l_NX_DMA_DMA_HANG_TIMER_REF_DIV_DIVIDE_BY_1024 ); FAPI_TRY(fapi2::putScom(TGT0, 0x201105cull, l_scom_buffer)); } { |
