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authorYue Du <daviddu@us.ibm.com>2017-09-06 21:55:50 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-09-14 23:33:40 -0400
commit52f2d77571c8557f5871c05307ee9ab58e147fe4 (patch)
treedaa13508d3185f8036058c0a94da1c25cf977902 /src/import/chips/p9/procedures/hwp/cache
parent7fd0d220c1142912a251a67c213ef215bd25007f (diff)
downloadtalos-hostboot-52f2d77571c8557f5871c05307ee9ab58e147fe4.tar.gz
talos-hostboot-52f2d77571c8557f5871c05307ee9ab58e147fe4.zip
StopClocks: Fence Refresh region if L3 region clock is stopped
Change-Id: I9f3af62d92bc6a44d77b34d8f407f9461f749ff9 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45767 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: ALEXANDER M. TAFT <amtaft@us.ibm.com> Dev-Ready: YUE DU <daviddu@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45769 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/cache')
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C18
1 files changed, 17 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C
index d8b611735..7fcc8719d 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C
@@ -76,6 +76,7 @@ p9_hcd_cache_stopclocks(
fapi2::buffer<uint64_t> l_data64;
fapi2::buffer<uint64_t> l_temp64;
uint64_t l_region_clock = 0;
+ uint64_t l_region_fence = 0;
uint64_t l_l3mask_pscom = 0;
uint32_t l_loops1ms = 0;
uint32_t l_scom_addr = 0;
@@ -267,8 +268,23 @@ p9_hcd_cache_stopclocks(
FAPI_DBG("Assert vital fence via CPLT_CTRL1[3]");
FAPI_TRY(putScom(i_target, EQ_CPLT_CTRL1_OR, MASK_SET(3)));
+ l_region_fence = l_region_clock;
+
+ if (!l_is_mpipl)
+ {
+ if (l_region_fence & p9hcd::CLK_REGION_EX0_L3)
+ {
+ l_region_fence |= p9hcd::CLK_REGION_EX0_REFR;
+ }
+
+ if (l_region_fence & p9hcd::CLK_REGION_EX1_L3)
+ {
+ l_region_fence |= p9hcd::CLK_REGION_EX1_REFR;
+ }
+ }
+
FAPI_DBG("Assert regional fences via CPLT_CTRL1[4-14]");
- FAPI_TRY(putScom(i_target, EQ_CPLT_CTRL1_OR, l_region_clock));
+ FAPI_TRY(putScom(i_target, EQ_CPLT_CTRL1_OR, l_region_fence));
// Gate the PCBMux request so scanning doesn't cause random requests
for(auto& it : l_core_functional_vector)
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