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| author | Shelton Leung <sleung@us.ibm.com> | 2017-06-12 18:03:41 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-19 13:56:39 -0400 |
| commit | 2207da70a83ec39306004bd6fcb1add8e35d8623 (patch) | |
| tree | d0b7b9ffcc28f1cae2bc30a60665872a45208167 /src/import/chips/p9/initfiles | |
| parent | 14b4ca3c76a4477d059d99892f5b76db159f4824 (diff) | |
| download | talos-hostboot-2207da70a83ec39306004bd6fcb1add8e35d8623.tar.gz talos-hostboot-2207da70a83ec39306004bd6fcb1add8e35d8623.zip | |
reinstate tag fifo workaround for DD2 due to read array issue, likely temporary
Change-Id: I6177bd2cd8aa225eece1282369924cda1334dc62
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41725
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41727
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/initfiles')
| -rw-r--r-- | src/import/chips/p9/initfiles/p9n.mca.scom.initfile | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/import/chips/p9/initfiles/p9n.mca.scom.initfile b/src/import/chips/p9/initfiles/p9n.mca.scom.initfile index 9ef84f608..d0fa0f82e 100644 --- a/src/import/chips/p9/initfiles/p9n.mca.scom.initfile +++ b/src/import/chips/p9/initfiles/p9n.mca.scom.initfile @@ -992,7 +992,10 @@ ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_NUM_RMW_BUF [when=S] { # All rctrl ops through tag FIFO (bit 0) # Serialize CMDLIST pf drop through rctrl (bit 1) -ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_RCTRL_CONFIG [when=S && ATTR_CHIP_EC_FEATURE_HW375732] { +# Reinstate tag fifo workaround for DD2 in response to early VBU issue +# Leaving old code here because workaround likely temporary +#ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_RCTRL_CONFIG [when=S && ATTR_CHIP_EC_FEATURE_HW375732] { +ispy MC01.PORT0.ATCL.CL.CLSCOM.MCPERF2_RCTRL_CONFIG [when=S] { spyv; 0b110; } |
