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author | Peng Fei GOU <shgoupf@cn.ibm.com> | 2017-04-26 02:12:04 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-05-17 14:17:53 -0400 |
commit | 158c1ca0eaa97d496646830610a0b0038602c527 (patch) | |
tree | 8aa81a7cd206c41853f802d6ac4a7c5e26c8a6ad /src/import/chips/p9/common | |
parent | 9dbf31ccdcad302407dc7af5a4ac52c63269f362 (diff) | |
download | talos-hostboot-158c1ca0eaa97d496646830610a0b0038602c527.tar.gz talos-hostboot-158c1ca0eaa97d496646830610a0b0038602c527.zip |
p9_throttle_sync -- initial version for Cumulus
1) Mostly copied from Nimbus settings.
2) Add findNumDimms() for dimm numbers.
3) Add MCMODE0 bit 27/28 programming for Nimbus DD2
and Cumulus.
4) No HW397255 workaround for Nimbus DD2 and Cumulus
5) Generalize throttleSync(), progMaster()
and progMCMODE0().
Change-Id: I74d96f4113cb2a33eaba6e1966b17aac693c9c4e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39695
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39712
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common')
-rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H index 69deff6da..ef6af5669 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H @@ -68,6 +68,10 @@ REG64_FLD( MCS_MCMODE0_GROUP_INTERLEAVE_GRANULARITY , 52 , SH_UN 0 ); REG64_FLD( MCS_MCMODE0_GROUP_INTERLEAVE_GRANULARITY_LEN , 4 , SH_UNT_MCS , SH_ACS_SCOM_RW , 0 ); +REG64_FLD( MCS_MCMODE0_DISABLE_MC_SYNC , 27 , SH_UNT_MCS , SH_ACS_SCOM_RW , + 0 ); +REG64_FLD( MCS_MCMODE0_DISABLE_MC_PAIR_SYNC , 28 , SH_UNT_MCS , SH_ACS_SCOM_RW , + 0 ); |