summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/common/scominfo
diff options
context:
space:
mode:
authorBen Gass <bgass@us.ibm.com>2019-01-27 08:04:43 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-01-29 11:36:00 -0600
commitc335cd14fff74ba22938f5872deda19460e36ec5 (patch)
tree1fb9d4f181d049202c083c2c1967f671de50977b /src/import/chips/p9/common/scominfo
parent164e4ec2af05c5beec0870495ddadc721c3823b9 (diff)
downloadtalos-hostboot-c335cd14fff74ba22938f5872deda19460e36ec5.tar.gz
talos-hostboot-c335cd14fff74ba22938f5872deda19460e36ec5.zip
Add missing Axone MC channel translations.
Change-Id: Ibb95cdb497401ce16f9d39d37e93a8e5618f0ffc Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70955 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Benjamin Gass <bgass@us.ibm.com> Dev-Ready: Benjamin Gass <bgass@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Brent Wieman <bwieman@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70958 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/scominfo')
-rw-r--r--src/import/chips/p9/common/scominfo/p9_scom_addr.H8
-rw-r--r--src/import/chips/p9/common/scominfo/p9_scominfo.C32
2 files changed, 34 insertions, 6 deletions
diff --git a/src/import/chips/p9/common/scominfo/p9_scom_addr.H b/src/import/chips/p9/common/scominfo/p9_scom_addr.H
index 98cb47c50..513cf0db6 100644
--- a/src/import/chips/p9/common/scominfo/p9_scom_addr.H
+++ b/src/import/chips/p9/common/scominfo/p9_scom_addr.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2018 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -431,6 +431,12 @@ extern "C"
P9A_MC_DL_REG2_SAT_ID = 0xF, ///< OMI reg2 (omi6..7)
} p9a_mc_sat_id_t;
+ // P9A Ring 8 Sat id
+ typedef enum
+ {
+ P9A_MC_CHAN_SAT_ID = 0xD,
+ } p9a_mc_chan_sat_id_t;
+
typedef enum
{
P9A_MC_DL_OMI0_FRST_REG = 0x10, ///< First register of OMI % 3 == 0
diff --git a/src/import/chips/p9/common/scominfo/p9_scominfo.C b/src/import/chips/p9/common/scominfo/p9_scominfo.C
index a00dee19d..0039625ca 100644
--- a/src/import/chips/p9/common/scominfo/p9_scominfo.C
+++ b/src/import/chips/p9/common/scominfo/p9_scominfo.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2018 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -322,14 +322,23 @@ extern "C"
//CHANX.DSTL. Sat_id: 01 + port_id (4,5,6,7)
l_scom.set_chiplet_id(MC01_CHIPLET_ID + (i_chipUnitNum / 4));
- if (P9A_MC_DSTL_CHAN0_SAT_ID <= l_sat_id && l_sat_id <= P9A_MC_DSTL_CHAN3_SAT_ID)
+ if (l_ring == P9A_MC_CHAN_RING_ID)
{
- l_scom.set_sat_id(P9A_MC_DSTL_CHAN0_SAT_ID + (i_chipUnitNum % 4));
+
+ if (P9A_MC_DSTL_CHAN0_SAT_ID <= l_sat_id && l_sat_id <= P9A_MC_DSTL_CHAN3_SAT_ID)
+ {
+ l_scom.set_sat_id(P9A_MC_DSTL_CHAN0_SAT_ID + (i_chipUnitNum % 4));
+ }
+
+ if (P9A_MC_USTL_CHAN0_SAT_ID <= l_sat_id && l_sat_id <= P9A_MC_USTL_CHAN3_SAT_ID)
+ {
+ l_scom.set_sat_id(P9A_MC_USTL_CHAN0_SAT_ID + (i_chipUnitNum % 4));
+ }
}
- if (P9A_MC_USTL_CHAN0_SAT_ID <= l_sat_id && l_sat_id <= P9A_MC_USTL_CHAN3_SAT_ID)
+ if (l_ring == P9A_MC_MC01_RING_ID && l_sat_id == P9A_MC_CHAN_SAT_ID)
{
- l_scom.set_sat_id(P9A_MC_USTL_CHAN0_SAT_ID + (i_chipUnitNum % 4));
+ l_scom.set_sat_offset((i_chipUnitNum * 16) + (l_sat_offset % 16));
}
}
@@ -1117,6 +1126,19 @@ extern "C"
}
}
+ // Ring 8, Sat 13,
+ // chan0: reg 0 -> 13
+ // chan1: reg 16 -> 29
+ // chan2: reg 32 -> 45
+ // chan3: reg 48 -> 61
+ if (l_ring == P9A_MC_MC01_RING_ID && l_sat_id == P9A_MC_CHAN_SAT_ID &&
+ l_port == UNIT_PORT_ID)
+ {
+ o_chipUnitRelated = true;
+ o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_MCC_CHIPUNIT, l_sat_offset / 16));
+ }
+
+
//==== OMIC target =============================================
//tc_unit_scom_cch_out(9) => tc_omippe00_0_scom_cch_int
//tc_unit_scom_cch_out(10) => tc_omippe01_0_scom_cch_int
OpenPOWER on IntegriCloud