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author | Ben Gass <bgass@us.ibm.com> | 2016-03-10 10:56:57 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-03-18 09:50:05 -0400 |
commit | b5dde707d42ea8fdc7bfe3bdc5515764ade8d73c (patch) | |
tree | 1c6e9521f66537ec7f7d4c28ff425e6f20c9c543 /src/import/chips/p9/common/scominfo/p9_scominfo.C | |
parent | af8c54f697e4d29df3948caf79cc7f83c4859471 (diff) | |
download | talos-hostboot-b5dde707d42ea8fdc7bfe3bdc5515764ade8d73c.tar.gz talos-hostboot-b5dde707d42ea8fdc7bfe3bdc5515764ade8d73c.zip |
Various updates.
Allow any instance of an address as input for
p9_scominfo_createChipUnitScomAddr
PHB register adjustments from Peng Fei with
adjustments for createChipUnitScomAddr
NV link address xlate corrected to match hw
PPE register supported added by use of i_mode 1
Change-Id: I082ebaf0ea74f20523b7c6e89584e2587eb0165d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21893
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server
Tested-by: Auto Mirror
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: Hostboot CI
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21894
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/scominfo/p9_scominfo.C')
-rw-r--r-- | src/import/chips/p9/common/scominfo/p9_scominfo.C | 306 |
1 files changed, 182 insertions, 124 deletions
diff --git a/src/import/chips/p9/common/scominfo/p9_scominfo.C b/src/import/chips/p9/common/scominfo/p9_scominfo.C index 17322d5cf..bc22649f1 100644 --- a/src/import/chips/p9/common/scominfo/p9_scominfo.C +++ b/src/import/chips/p9/common/scominfo/p9_scominfo.C @@ -40,137 +40,173 @@ extern "C" const uint64_t i_scomAddr, const uint32_t i_mode) { p9_scom_addr l_scom(i_scomAddr); - (void) i_mode; - switch (i_p9CU) + //Used to help generate entries for the SCOMdef documentation, + //These aren't general PIB addresses + if (i_mode == PPE_MODE) { - case PU_PERV_CHIPUNIT: - l_scom.set_chiplet_id(i_chipUnitNum); - break; + switch (i_p9CU) + { - case PU_C_CHIPUNIT: - l_scom.set_chiplet_id(EC00_CHIPLET_ID + i_chipUnitNum); - break; + case PU_EX_CHIPUNIT: + if (PPE_EP05_CHIPLET_ID >= l_scom.get_chiplet_id() && + l_scom.get_chiplet_id() >= PPE_EP00_CHIPLET_ID) + { + l_scom.set_chiplet_id(PPE_EP00_CHIPLET_ID + (i_chipUnitNum / 2)); + l_scom.set_port( ( i_chipUnitNum % 2 ) + 1 ); + } - case PU_EX_CHIPUNIT: - if (EP05_CHIPLET_ID >= l_scom.get_chiplet_id() && - l_scom.get_chiplet_id() >= EP00_CHIPLET_ID) - { - l_scom.set_chiplet_id(EP00_CHIPLET_ID + (i_chipUnitNum / 2)); - l_scom.set_ring( ( l_scom.get_ring() - ( l_scom.get_ring() % 2 ) ) + - ( i_chipUnitNum % 2 ) ); - } - else if (EC23_CHIPLET_ID >= l_scom.get_chiplet_id() && - l_scom.get_chiplet_id() >= EC00_CHIPLET_ID) - { - l_scom.set_chiplet_id( EC00_CHIPLET_ID + - (l_scom.get_chiplet_id() % 2) + - (i_chipUnitNum * 2)); - } + break; - break; + default: + l_scom.set_addr(FAILED_TRANSLATION); + break; + } + } + //Regular PIB addresses (not PPE) + else + { + switch (i_p9CU) + { + case PU_PERV_CHIPUNIT: + l_scom.set_chiplet_id(i_chipUnitNum); + break; - case PU_EQ_CHIPUNIT: - l_scom.set_chiplet_id(EP00_CHIPLET_ID + i_chipUnitNum); - break; + case PU_C_CHIPUNIT: + l_scom.set_chiplet_id(EC00_CHIPLET_ID + i_chipUnitNum); + break; - case PU_CAPP_CHIPUNIT: - l_scom.set_chiplet_id(N0_CHIPLET_ID + (i_chipUnitNum * 2)); - break; + case PU_EX_CHIPUNIT: + if (EP05_CHIPLET_ID >= l_scom.get_chiplet_id() && + l_scom.get_chiplet_id() >= EP00_CHIPLET_ID) + { + l_scom.set_chiplet_id(EP00_CHIPLET_ID + (i_chipUnitNum / 2)); + l_scom.set_ring( ( l_scom.get_ring() - ( l_scom.get_ring() % 2 ) ) + + ( i_chipUnitNum % 2 ) ); + } + else if (EC23_CHIPLET_ID >= l_scom.get_chiplet_id() && + l_scom.get_chiplet_id() >= EC00_CHIPLET_ID) + { + l_scom.set_chiplet_id( EC00_CHIPLET_ID + + (l_scom.get_chiplet_id() % 2) + + (i_chipUnitNum * 2)); + } - case PU_MCS_CHIPUNIT: - l_scom.set_chiplet_id(N3_CHIPLET_ID - (2 * (i_chipUnitNum / 2))); - l_scom.set_sat_id(2 * (i_chipUnitNum % 2)); - break; + break; - case PU_MCBIST_CHIPUNIT: - l_scom.set_chiplet_id(MC01_CHIPLET_ID + i_chipUnitNum); - break; + case PU_EQ_CHIPUNIT: + l_scom.set_chiplet_id(EP00_CHIPLET_ID + i_chipUnitNum); + break; - case PU_MCA_CHIPUNIT: - l_scom.set_chiplet_id(MC01_CHIPLET_ID + (i_chipUnitNum / 4)); + case PU_CAPP_CHIPUNIT: + l_scom.set_chiplet_id(N0_CHIPLET_ID + (i_chipUnitNum * 2)); + break; - if (l_scom.get_ring() == MC_MC01_0_RING_ID) - { - // mc - l_scom.set_sat_id( ( l_scom.get_sat_id() - ( l_scom.get_sat_id() % 4 ) ) + - ( i_chipUnitNum % 4 )); - } - else - { - // iomc - l_scom.set_ring(MC_IOM01_0_RING_ID + (i_chipUnitNum % 4)); - } + case PU_MCS_CHIPUNIT: + l_scom.set_chiplet_id(N3_CHIPLET_ID - (2 * (i_chipUnitNum / 2))); + l_scom.set_sat_id(2 * (i_chipUnitNum % 2)); + break; - break; + case PU_MCBIST_CHIPUNIT: + l_scom.set_chiplet_id(MC01_CHIPLET_ID + i_chipUnitNum); + break; - case PU_NV_CHIPUNIT: - l_scom.set_ring(4 + (i_chipUnitNum / 4)); - l_scom.set_sat_id(((i_chipUnitNum == 2) || (i_chipUnitNum == 3)) ? 7 : 3); - l_scom.set_sat_offset( (l_scom.get_sat_offset() % 32) + - (32 * (i_chipUnitNum % 2))); - break; + case PU_MCA_CHIPUNIT: + l_scom.set_chiplet_id(MC01_CHIPLET_ID + (i_chipUnitNum / 4)); - case PU_PEC_CHIPUNIT: - if (l_scom.get_chiplet_id() == N2_CHIPLET_ID) - { - // nest - l_scom.set_ring(N2_PCIS0_0_RING_ID + i_chipUnitNum); - } - else - { - // iopci / pci - l_scom.set_chiplet_id(PCI0_CHIPLET_ID + i_chipUnitNum); - } + if (l_scom.get_ring() == MC_MC01_0_RING_ID) + { + // mc + l_scom.set_sat_id( ( l_scom.get_sat_id() - ( l_scom.get_sat_id() % 4 ) ) + + ( i_chipUnitNum % 4 )); + } + else + { + // iomc + l_scom.set_ring(MC_IOM01_0_RING_ID + (i_chipUnitNum % 4)); + } - break; + break; - case PU_PHB_CHIPUNIT: - if (l_scom.get_chiplet_id() == N2_CHIPLET_ID) - { - // nest - if (i_chipUnitNum != 0) + case PU_NV_CHIPUNIT: + l_scom.set_sat_id((l_scom.get_sat_id() % 4) + ((i_chipUnitNum / 2) * 4)); + l_scom.set_sat_offset( (l_scom.get_sat_offset() % 32) + + (32 * (i_chipUnitNum % 2))); + break; + + case PU_PEC_CHIPUNIT: + if (l_scom.get_chiplet_id() == N2_CHIPLET_ID) { - l_scom.set_ring(N2_PCIS0_0_RING_ID + (i_chipUnitNum / 3) + 1); - l_scom.set_sat_id(i_chipUnitNum + 2 - - (l_scom.get_ring() - N2_PCIS0_0_RING_ID)); + // nest + l_scom.set_ring(N2_PCIS0_0_RING_ID + i_chipUnitNum); } - } - else - { - // pci - if (i_chipUnitNum != 0) + else { - l_scom.set_chiplet_id(PCI0_CHIPLET_ID + (i_chipUnitNum / 3) + 1); - l_scom.set_sat_id(i_chipUnitNum + 2 - - (l_scom.get_chiplet_id() - PCI0_CHIPLET_ID)); + // iopci / pci + l_scom.set_chiplet_id(PCI0_CHIPLET_ID + i_chipUnitNum); } - } - break; + break; + + case PU_PHB_CHIPUNIT: + if (l_scom.get_chiplet_id() == N2_CHIPLET_ID) + { + // nest + if (i_chipUnitNum == 0) + { + l_scom.set_ring(N2_PCIS0_0_RING_ID); + l_scom.set_sat_id(((l_scom.get_sat_id() < 4) ? (1) : (4))); + } + else + { + l_scom.set_ring(N2_PCIS0_0_RING_ID + (i_chipUnitNum / 3) + 1); + l_scom.set_sat_id( ((l_scom.get_sat_id() < 4) ? (1) : (4)) + + ((i_chipUnitNum % 2) ? (0) : (1)) + + (2 * (i_chipUnitNum / 5))); + } + } + else + { + // pci + if (i_chipUnitNum == 0) + { + l_scom.set_chiplet_id(PCI0_CHIPLET_ID); + l_scom.set_sat_id(((l_scom.get_sat_id() < 4) ? (1) : (4))); + } + else + { + l_scom.set_chiplet_id(PCI0_CHIPLET_ID + (i_chipUnitNum / 3) + 1); + l_scom.set_sat_id(((l_scom.get_sat_id() < 4) ? (1) : (4)) + + ((i_chipUnitNum % 2) ? (0) : (1)) + + (2 * (i_chipUnitNum / 5))); + } + } - case PU_OBUS_CHIPUNIT: - l_scom.set_chiplet_id(OB0_CHIPLET_ID + i_chipUnitNum); - break; + break; - case PU_XBUS_CHIPUNIT: - if (XB_IOX_2_RING_ID >= l_scom.get_ring() && - l_scom.get_ring() >= XB_IOX_0_RING_ID) - { - l_scom.set_ring(XB_IOX_0_RING_ID + i_chipUnitNum); - } + case PU_OBUS_CHIPUNIT: + l_scom.set_chiplet_id(OB0_CHIPLET_ID + i_chipUnitNum); + break; - if (XB_PBIOX_2_RING_ID >= l_scom.get_ring() && - l_scom.get_ring() >= XB_PBIOX_0_RING_ID) - { - l_scom.set_ring(XB_PBIOX_0_RING_ID + i_chipUnitNum); - } + case PU_XBUS_CHIPUNIT: + if (XB_IOX_2_RING_ID >= l_scom.get_ring() && + l_scom.get_ring() >= XB_IOX_0_RING_ID) + { + l_scom.set_ring(XB_IOX_0_RING_ID + i_chipUnitNum); + } + + if (XB_PBIOX_2_RING_ID >= l_scom.get_ring() && + l_scom.get_ring() >= XB_PBIOX_0_RING_ID) + { + l_scom.set_ring(XB_PBIOX_0_RING_ID + i_chipUnitNum); + } - break; + break; - default: - l_scom.set_addr(FAILED_TRANSLATION); - break; + default: + l_scom.set_addr(FAILED_TRANSLATION); + break; + } } return l_scom.get_addr(); @@ -182,7 +218,6 @@ extern "C" { p9_scom_addr l_scom(i_scomAddr); o_chipUnitRelated = false; - (void) i_mode; uint8_t l_chiplet_id = l_scom.get_chiplet_id(); uint8_t l_port = l_scom.get_port(); @@ -190,7 +225,21 @@ extern "C" uint8_t l_sat_id = l_scom.get_sat_id(); uint8_t l_sat_offset = l_scom.get_sat_offset(); - if (l_scom.is_unicast()) + if (i_mode == PPE_MODE) + { + if (PPE_EP00_CHIPLET_ID <= l_chiplet_id && + l_chiplet_id <= PPE_EP05_CHIPLET_ID) + { + o_chipUnitRelated = true; + o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_EX_CHIPUNIT, + ((l_chiplet_id - PPE_EP00_CHIPLET_ID) * 2) + + (l_port - 1))); + + } + + } + + else if (l_scom.is_unicast()) { // common 'pervasive' registers associated with each pervasive chiplet type // permit addressing by PERV target type (for all pervasive chiplet instances) @@ -293,9 +342,13 @@ extern "C" // PU_MCBIST_CHIPUNIT (mc) // mcbist: 0..1 if (((l_chiplet_id == MC01_CHIPLET_ID) || (l_chiplet_id == MC23_CHIPLET_ID)) && - (l_port == UNIT_PORT_ID) && - (l_ring == MC_MC01_1_RING_ID) && - ((l_sat_id & 0xC) == MC_DIR_SAT_ID_MCBIST)) //MCBIST has 2 bit sat_id + (((l_port == UNIT_PORT_ID) && + (((l_ring == MC_MC01_1_RING_ID) && + ((l_sat_id & 0xC) == MC_DIR_SAT_ID_MCBIST)) || //MCBIST has 2 bit sat_id + ((l_ring == MC_PERV_RING_ID) || //Translate MC perv regs with MCBIST + (l_ring == XB_PSCM_RING_ID) || + (l_ring == MC_MCTRA_0_RING_ID)) )) || //Translate TRA regs with MCBIST + (l_port != UNIT_PORT_ID)) ) //Translate MC perv regs with MCBIST { o_chipUnitRelated = true; o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_MCBIST_CHIPUNIT, @@ -329,16 +382,17 @@ extern "C" } // PU_NV_CHIPUNIT + // See npu_misc_regs.vhdl, line 2710, + // sc_addr(0 to 6) represents sat_id(0..3) and sat_offset(0..2) + // only stkX, ntlX registers are translated to NX target type // nv: 0..5 if ((l_chiplet_id == N3_CHIPLET_ID) && (l_port == UNIT_PORT_ID) && - (((l_ring == N3_NPU_0_RING_ID) && ((l_sat_id == 3) || (l_sat_id == 7))) || - ((l_ring == N3_NPU_1_RING_ID) && (l_sat_id == 3)))) + (((l_ring == N3_NPU_0_RING_ID) && ((l_sat_id % 4) == 3) && l_sat_id <= 11))) { o_chipUnitRelated = true; o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_NV_CHIPUNIT, - (4 * (l_ring - N3_NPU_0_RING_ID)) + - (2 * (l_sat_id / 7)) + + (2 * (l_sat_id / 4)) + (l_sat_offset / 32))); } @@ -358,13 +412,19 @@ extern "C" // source: iop_scom_cntl_rlm_mac.vhdl // pec: 0..2 if (((l_chiplet_id >= PCI0_CHIPLET_ID) && (l_chiplet_id <= PCI2_CHIPLET_ID)) && - (l_port == UNIT_PORT_ID) && - ((l_ring == PCI_IOPCI_0_RING_ID) || (l_ring == PCI_PE_0_RING_ID)) && - (l_sat_id == PEC_SAT_ID)) + ((l_port != UNIT_PORT_ID) || + ((l_port == UNIT_PORT_ID) && + ((l_ring == PCI_IOPCI_0_RING_ID) || (l_ring == PCI_PE_0_RING_ID) || + (l_ring == PCI_PERV_RING_ID)) && + (l_sat_id == PEC_SAT_ID)))) { - o_chipUnitRelated = true; - o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_PEC_CHIPUNIT, - (l_chiplet_id - PCI0_CHIPLET_ID))); + + if ((l_chiplet_id >= PCI0_CHIPLET_ID) && (l_chiplet_id <= PCI2_CHIPLET_ID)) + { + o_chipUnitRelated = true; + o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_PEC_CHIPUNIT, + (l_chiplet_id - PCI0_CHIPLET_ID))); + } } // PU_PHB_CHIPUNIT (nest) @@ -401,10 +461,7 @@ extern "C" // PU_OBUS_CHIPUNIT // obus: 0..3 - if (((l_chiplet_id >= OB0_CHIPLET_ID) && (l_chiplet_id <= OB3_CHIPLET_ID)) && - (l_port == UNIT_PORT_ID) && - (((l_ring == OB_PBIOA_0_RING_ID) && (l_sat_id == OB_PB_SAT_ID)) || - ((l_ring == OB_IOO_0_RING_ID) && ((l_sat_id == OB_IOO_SAT_ID) || (l_sat_id == OB_PPE_SAT_ID))))) + if (((l_chiplet_id >= OB0_CHIPLET_ID) && (l_chiplet_id <= OB3_CHIPLET_ID))) { o_chipUnitRelated = true; o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_OBUS_CHIPUNIT, @@ -421,6 +478,7 @@ extern "C" o_chipUnitRelated = true; o_chipUnitPairing.push_back(p9_chipUnitPairing_t(PU_XBUS_CHIPUNIT, l_ring % 3)); + } } |