diff options
| author | Ben Gass <bgass@us.ibm.com> | 2018-10-19 07:32:27 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-04-04 09:25:38 -0500 |
| commit | b823dd50837a9f05cf69dc75d5942319f537024d (patch) | |
| tree | 7414d5b461004c3d475ba2cb0ed25bd11c5b71c6 /src/import/chips/p9/common/include | |
| parent | e5622fb032dc8b23627d8ca06d82a10b612d5435 (diff) | |
| download | talos-hostboot-b823dd50837a9f05cf69dc75d5942319f537024d.tar.gz talos-hostboot-b823dd50837a9f05cf69dc75d5942319f537024d.zip | |
Update p9_mss_eff_grouping for Axone support
Add p9a_omi_setup_bars procedure
Add eclipse project files to .gitignore
Change-Id: Ia18cd213ac8b3682e5718b3c631dad631b97170f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67755
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67764
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/include')
| -rw-r--r-- | src/import/chips/p9/common/include/p9a_misc_scom_addresses.H | 6 | ||||
| -rw-r--r-- | src/import/chips/p9/common/include/p9a_misc_scom_addresses_fld.H | 17 |
2 files changed, 23 insertions, 0 deletions
diff --git a/src/import/chips/p9/common/include/p9a_misc_scom_addresses.H b/src/import/chips/p9/common/include/p9a_misc_scom_addresses.H index eb79d6ebd..1d417e8de 100644 --- a/src/import/chips/p9/common/include/p9a_misc_scom_addresses.H +++ b/src/import/chips/p9/common/include/p9a_misc_scom_addresses.H @@ -18136,4 +18136,10 @@ static const uint64_t P9A_PU_NPU2_NTL1_XTS_PMU_CNT = static const uint64_t P9A__NTL1_XTS_PMU_CNT = 0x050116F8ull; +//Manual additions +static const uint64_t P9A_MI_MCFGPM0 = 0x05010820ull; +static const uint64_t P9A_MI_MCFGPM1 = 0x05010830ull; +static const uint64_t P9A_MI_MCFGPM0A = 0x05010821ull; +static const uint64_t P9A_MI_MCFGPM1A = 0x05010831ull; + #endif diff --git a/src/import/chips/p9/common/include/p9a_misc_scom_addresses_fld.H b/src/import/chips/p9/common/include/p9a_misc_scom_addresses_fld.H index 63d86308f..c76592c09 100644 --- a/src/import/chips/p9/common/include/p9a_misc_scom_addresses_fld.H +++ b/src/import/chips/p9/common/include/p9a_misc_scom_addresses_fld.H @@ -58516,4 +58516,21 @@ static const uint8_t P9A_PU_NPU2_NTL1_XTS_PMU_CNT_CNT2_LEN = 1 static const uint8_t P9A_PU_NPU2_NTL1_XTS_PMU_CNT_CNT3 = 48 ; static const uint8_t P9A_PU_NPU2_NTL1_XTS_PMU_CNT_CNT3_LEN = 16 ; +// Manual additions +static const uint64_t P9A_MI_MCFGPM0_VALID = 0; +static const uint64_t P9A_MI_MCFGPM0_GROUP_BASE_ADDRESS = 1; +static const uint64_t P9A_MI_MCFGPM0_GROUP_BASE_ADDRESS_LEN = 24; +static const uint64_t P9A_MI_MCFGPM0_GROUP_SIZE = 25; +static const uint64_t P9A_MI_MCFGPM0_GROUP_SIZE_LEN = 15; + +static const uint64_t P9A_MI_MCFGPM0A_HOLE_VALID = 0; +static const uint64_t P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS = 1; +static const uint64_t P9A_MI_MCFGPM0A_HOLE_LOWER_ADDRESS_LEN = 15; +static const uint64_t P9A_MI_MCFGPM0A_SMF_VALID = 22; +static const uint64_t P9A_MI_MCFGPM0A_SMF_EXTEND_TO_END_OF_RANGE = 23; +static const uint64_t P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS = 24; +static const uint64_t P9A_MI_MCFGPM0A_SMF_LOWER_ADDRESS_LEN = 19; +static const uint64_t P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS = 43; +static const uint64_t P9A_MI_MCFGPM0A_SMF_UPPER_ADDRESS_LEN = 19; + #endif |

