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| author | Ben Gass <bgass@us.ibm.com> | 2016-05-18 13:01:57 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-01 14:37:49 -0400 |
| commit | b1ed58c10721fe1ec98dd537929a2942e08765d0 (patch) | |
| tree | 11574d41a6edf70d1ed7d24ef8e1e3b05a2aa21b /src/import/chips/p9/common/include | |
| parent | 0990c2c96fc3baed7908e855bacaa854b2210d0b (diff) | |
| download | talos-hostboot-b1ed58c10721fe1ec98dd537929a2942e08765d0.tar.gz talos-hostboot-b1ed58c10721fe1ec98dd537929a2942e08765d0.zip | |
Translate logical mca regisers in mcs chiplet as mca target type
Fixup memory code which uses the xlt registers
Add dependent epsilon inits
Change-Id: I995bcd895a0a7a431dcf350475fd387be70749c9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24733
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Dev-Ready: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24734
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/include')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H index a9b21a258..6e13c9b76 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fixes.H @@ -32,6 +32,11 @@ #ifndef __P9_MC_SCOM_ADDRESSES_FIXES_H #define __P9_MC_SCOM_ADDRESSES_FIXES_H +// More of an addition than a fix. +REG64( MCA_MBA_MCP0XLT0 , RULL(0x05010820), SH_UNT_MCA , SH_ACS_SCOM_RW ); +REG64( MCA_MBA_MCP0XLT1 , RULL(0x05010821), SH_UNT_MCA , SH_ACS_SCOM_RW ); +REG64( MCA_MBA_MCP0XLT2 , RULL(0x05010822), SH_UNT_MCA , SH_ACS_SCOM_RW ); + // FIXREG64( MCBIST_MCBIST_CCSARRERRINJQ , RULL(0x07010FDE), SH_UNT_MCBIST , // SH_ACS_SCOM_RW , RULL(0x0701219E) ); // FIXREG64( MCBIST_MCBIST_0_CCSARRERRINJQ , RULL(0x07010FDE), SH_UNT_MCBIST_0 , |
