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| author | Louis Stermole <stermole@us.ibm.com> | 2017-05-30 13:06:59 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-07 16:41:01 -0400 |
| commit | 90fc4d2acbf077a421219d82cfa9886c52ceaec5 (patch) | |
| tree | db5570bc271bb8d02644f9a3a072f51ed5e4db56 /src/import/chips/p9/common/include | |
| parent | c09c9035a23e945413b38535bba72ba2331ab526 (diff) | |
| download | talos-hostboot-90fc4d2acbf077a421219d82cfa9886c52ceaec5.tar.gz talos-hostboot-90fc4d2acbf077a421219d82cfa9886c52ceaec5.zip | |
Add PHY DP16 DRIFT_LIMITS regs and DD2_BLUE_WATERFALL_EXT field API
Change-Id: Ia891488d7de965a99c8cf3c457fccba9603773ad
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41136
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41167
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/include')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H index 1a7dc1d70..794a20ff8 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H @@ -147,6 +147,8 @@ static const uint64_t SH_FLD_4_BIT15_LEN = 99990097; static const uint64_t SH_FLD_01_DD2_PERBIT_RDVREF_DISABLE = 99990098; static const uint64_t SH_FLD_23_DD2_PERBIT_RDVREF_DISABLE = 99990099; static const uint64_t SH_FLD_4_DD2_PERBIT_RDVREF_DISABLE = 99990100; +static const uint64_t SH_FLD_01_DD2_BLUE_EXTEND_RANGE = 99990101; +static const uint64_t SH_FLD_01_DD2_BLUE_EXTEND_RANGE_LEN = 99990102; REG64_FLD( MCA_DDRPHY_DP16_SYSCLK_PR0_P0_0_01_ENABLE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , 0 ); @@ -583,4 +585,8 @@ REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4_4_BIT15 , 57 , SH_UNT_M REG64_FLD( MCA_DDRPHY_DP16_RD_VREF_DAC_7_P0_4_4_BIT15_LEN , 7 , SH_UNT_MCA , SH_ACS_SCOM_RW , SH_FLD_4_BIT15_LEN ); +REG64_FLD( MCA_DDRPHY_DP16_DRIFT_LIMITS_P0_0_01_DD2_BLUE_EXTEND_RANGE , 48 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DD2_BLUE_EXTEND_RANGE ); +REG64_FLD( MCA_DDRPHY_DP16_DRIFT_LIMITS_P0_0_01_DD2_BLUE_EXTEND_RANGE_LEN , 2 , SH_UNT_MCA , SH_ACS_SCOM_RW , + SH_FLD_01_DD2_BLUE_EXTEND_RANGE_LEN ); #endif |
