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| author | Ben Gass <bgass@us.ibm.com> | 2016-09-15 14:11:53 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-09-24 15:39:48 -0400 |
| commit | 441e3f07dd12e491efc0b586501598e8989f7cb1 (patch) | |
| tree | 456d609e0d01dc855a896582a3d3b3cd789ee3d4 /src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H | |
| parent | c6aa1b00f9ee7a7241e4231e559c42cec1154ef9 (diff) | |
| download | talos-hostboot-441e3f07dd12e491efc0b586501598e8989f7cb1.tar.gz talos-hostboot-441e3f07dd12e491efc0b586501598e8989f7cb1.zip | |
Header file updates based on 9067 figtree
Associated changes based on constant name changes.
Add wregister part_decl and access fields.
Change-Id: I74810bb75430981bfcc0d964823fe249866a1dcf
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29797
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Yang Fan Liu <shliuyf@cn.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29803
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H')
| -rw-r--r-- | src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H index d522b1bcd..2fe43879a 100644 --- a/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9_mc_scom_addresses_fld_fixes.H @@ -45,7 +45,10 @@ //FIXREG64_FLD( PU_ALTD_CMD_REG_FBC_WITH_TM_QUIESCE, 24, SH_UNT, SH_ACS_SCOM, SH_FLD_FBC_WITH_TM_QUIESCE, // 12); + static const uint64_t SH_FLD_COMMAND_LIST_TIMEOUT_SPEC = 99990000; +static const uint64_t SH_FLD_CFG_PAUSE_ON_MCE = 99990001; + REG64_FLD( MCS_MCFIR_COMMAND_LIST_TIMEOUT_SPEC , 9 , SH_UNT_MCS , SH_ACS_SCOM2_OR , SH_FLD_COMMAND_LIST_TIMEOUT_SPEC ); @@ -61,4 +64,8 @@ REG64_FLD( MCA_DDRPHY_WC_RTT_WR_CTL_SWAP_ENABLE_P0 , 49 , SH_UN REG64_FLD( MCBIST_MCBCFGQ_CFG_MCBIST_CFG_FORCE_PAUSE_AFTER_RANK , 34 , SH_UNT_MCA , SH_ACS_SCOM_RW , 0 ); +REG64_FLD( MCBIST_MBSTRQ_CFG_PAUSE_ON_MCE , 33 , SH_UNT_MCBIST , SH_ACS_SCOM_RW , + SH_FLD_CFG_PAUSE_ON_MCE ); + + #endif |
